Interlevel dielectric thickness monitor for complex semiconducto

Details Interlevel dielectric thickness monitor for complex semiconducto Interlevel dielectric thickness monitor for complex semiconducto

1997-12-16

2000-06-06

Chaudhuri, Olik

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

438 14, 438697, 438645, H01L 2358, H01L 214763

Patent

active

06072191&

ABSTRACT:
A method of measuring the thickness of a dielectric layer above a plurality of structures of differing types within a semiconductor chip. The method comprises the steps of: forming a plurality of monitor boxes on a semiconductor chip such that each of said plurality of monitor boxes represents a structure type within the semiconductor chip and has substantially the same step height as one of a plurality of differing structure types; forming a dielectric layer over the semiconductor chip; and measuring a thickness of the dielectric layer above at least one of the plurality of monitor boxes, wherein said thickness represents a thickness of the dielectric layer above a structure of the structure type represented by the monitor box.
Also disclosed is a semiconductor chip that allows for accurate dielectric thickness measurements. The chip comprises: a plurality of structures of differing types located on a surface within the semiconductor chip; and a plurality of monitor boxes, located on said surface within the semiconductor chip, upon which measurements of dielectric thickness can be made, wherein each of the plurality of monitor boxes represents a structure type within the semiconductor chip.

REFERENCES:
patent: 4944836 (1990-07-01), Beyer et al.
patent: 5084071 (1992-01-01), Nenadic et al.
patent: 5204835 (1993-04-01), Eitan
patent: 5472892 (1995-12-01), Gwen et al.
patent: 5903011 (1999-05-01), Hatanaka
patent: 5903489 (1999-05-01), Hayano

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