Interlevel dielectric structure and method of forming same

Details Interlevel dielectric structure and method of forming same Interlevel dielectric structure and method of forming same

2005-01-11

2005-01-11

Quach, T. N. (Department: 2814)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S623000, C438S624000, C438S631000

Reexamination Certificate

active

06841463

ABSTRACT:
An interlevel dielectric structure includes first and second dielectric layers between which are located lines of a conductive material with a dielectric material in spaces between the lines of conductive material, with the lower surface of the dielectric material extending lower than the lower surface of lines of conductive material adjacent thereto, and the upper surface of the dielectric material extending higher than the upper surface of conductive material adjacent thereto, thus reducing fringe and total capacitance between the lines of conductive material. The dielectric material, which has a dielectric constant of less than about 3.6, does not extend directly above the upper surface of the lines of conductive material, allowing formation of subsequent contacts down to the lines of conductive material without exposing the dielectric material to further processing. Various methods for forming the interlevel dielectric structure are disclosed.

REFERENCES:
patent: 5399235 (1995-03-01), Mutsaers et al.
patent: 5420075 (1995-05-01), Homma et al.
patent: 5445996 (1995-08-01), Kodera et al.
patent: 5486493 (1996-01-01), Jeng
patent: 5599740 (1997-02-01), Jang et al.
patent: 5641382 (1997-06-01), Shih et al.
patent: 5677239 (1997-10-01), Isobe
patent: 5708303 (1998-01-01), Jeng
patent: 5795829 (1998-08-01), Shen
patent: 6087250 (2000-07-01), Hyakutake
patent: 6136687 (2000-10-01), Lee et al.
patent: 6146987 (2000-11-01), Wang et al.
patent: 6166439 (2000-12-01), Cox
patent: 6177286 (2001-01-01), Chiddambarrao et al.
patent: 6278174 (2001-08-01), Havemann et al.
M.K. Jain et al., “Advanced Metalization and Interconnect Systems for ULSI Applications: Homogenous and Multilayer Low-K Interlevel Dielectric Architectures for Capacitance Reduction,” Conference at University of California, Berkeley, California, Oct. 1996.
Tetsuya Homma, “Fluorinated SiO2 Films for Interlayer Dielectrics in Quarter-Micron ULSI Multilevel Interconnections,” Mat. Res. Soc. Symp. Proc., vol. 381, pp. 239-248, 1995.
J. Wary et al., “Vacuum-Deposited Parylene AF-4: A Thermally Stable, Low Dielectric Constant Polymer For Interlayer Dielectric Use,” DUMIC Conference, pp. 207-213, Feb., 1996.

Affiliated with

Also associated with

Rating

Interlevel dielectric structure and method of forming same does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Interlevel dielectric structure and method of forming same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Interlevel dielectric structure and method of forming same will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3383346