Interleaving apparatus and interleaving method, encoding...

Details Interleaving apparatus and interleaving method, encoding... Interleaving apparatus and interleaving method, encoding...

2005-09-13

2005-09-13

Ellis, Kevin L. (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

Reexamination Certificate

active

06944727

ABSTRACT:
An interleaver which is applied to an encoding apparatus and/or a decoding apparatus in a data transmission/reception system comprises two banks of single-port RAM, and a control unit for controlling writing and reading of data to and from the two banks of RAM. The interleaver controls writing and reading of data to and from the two banks of RAM with the control unit such that the input data, wherein permuting from the input data into the output data is symmetrical, and which is at an arbitrary position wherein, with regard to an integer i which is 2 or greater and integers j and k which are 0 or greater but less than i, the residue from division by i is j, is output as the output data at a position wherein the residue from division by i is k. Accordingly, consecutive interleaving processing can be realized with a small circuit size.

REFERENCES:
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patent: 6598202 (2003-07-01), Kim et al.
patent: 6603412 (2003-08-01), Gatherer et al.
patent: 6701467 (2004-03-01), Victor
patent: 6732316 (2004-05-01), Tong et al.
patent: 6772391 (2004-08-01), Shin
Japanese Publication-Foundations in Turbo Coding: Triceps KK, White Series No. 198, Oct. 7, 1999; (English Translation) p 37, 38, 61, 62.

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