Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
2000-03-21
2002-12-17
Arbes, Carl J. (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S825000, C029S832000, C029S846000, C228S180100, C228S180220
Reexamination Certificate
active
06493935
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the field of integrated circuit device packages, and more particularly, to connections between an integrated circuit die and terminal(s) on an integrated circuit device package.
BACKGROUND OF THE INVENTION
While integrated circuit devices continue to increase in complexity, keeping costs low and form factors small is still a focus for many applications. A key factor in determining the cost and space taken up by a particular integrated circuit device can be the package in which the integrated circuit device is provided.
For integrated circuit devices such as microprocessor chipsets, for example, that are particularly cost- and space-sensitive, a relatively small plastic package having a dense input/output terminal pattern may be used. Ball grid array (BGA) packages, for example, are increasingly popular because they are capable of providing a dense terminal array in a relatively small area at a relatively low cost.
“Terminals” as the term is used herein, refers to external, electrically conductive features provided on a package for transferring signals to and from the integrated circuit die within the package. Types of terminals include pins, solder balls, polymer balls coated with a conductive material, solder columns, land pads, etc. The type of terminal depends on the type of package being used.
To transfer signals to and from an integrated circuit die within a package, bondwires may be used to electrically connect bondpads on the integrated circuit die to bondfingers or bondposts on a package substrate. Individual traces and vias on the package substrate electrically couple the bondfingers to the respective terminals that provide the input/output connections for the package.
The routing of electrical connections from bondpads on the integrated circuit die to the package terminals presents several challenges for integrated circuit package designers. In particular, there may be more bondpads on the integrated circuit die (or bondwires from the integrated circuit die to the package substrate) than there are available terminals on the package. This circumstance may arise, for example, where multiple power and/or ground connections to the integrated circuit die are provided. Multiple power and/or ground connections are desirable in many cases to improve the quality and strength of the signals transmitted to and from an integrated circuit die.
One approach to addressing this issue is illustrated in FIG.
1
.
FIG. 1
is a top view of a portion of a package substrate
10
having an integrated circuit die
11
mounted thereon. The integrated circuit die
11
includes a double bondpad
12
and two bondwires
13
extending from the bondpad
12
to a double bondfinger
14
. The double bondfinger
14
is electrically connected to a single conductive trace
15
extending to a single via
16
. The via
16
is electrically connected by a conductive trace on another layer or surface of the substrate
10
to a single power terminal
17
(shown in phantom). The power terminal
17
is coupled to an underside of the package substrate
10
. In this manner, the package substrate
10
of
FIG. 1
provides for multiple power connections to a single power terminal
17
such that the number of bondpads on the die
11
may be greater than the number of available terminals.
A disadvantage of this approach, however, is that while a ground connection may be provided on either side of the double power connection, a ground bondwire or other ground connection cannot be provided between the two power bondwires
13
. Lack of a ground connection between the two power bondwires
13
of
FIG. 1
can cause the inductance of the combined power connection to be undesirably high. High inductance can adversely affect device performance.
Further, different types of bondwires and/or integrated circuit device packages including substrates that are different than the substrate
10
of
FIG. 1
that have dense terminal layouts may present similar issues.
SUMMARY OF THE INVENTION
An integrated circuit device package includes a substrate including a first terminal coupled to the substrate. First and second conductive traces are formed on the substrate and electrically coupled to the first terminal, wherein the first conductive trace is to couple a first bondwire to the first terminal and the second conductive trace is to couple a second bondwire to the first terminal.
Other features and advantages of the present invention will be apparent from the accompanying drawings and from the detailed description that follows below.
REFERENCES:
patent: 4417392 (1983-11-01), Ibrahim et al.
patent: 5072519 (1991-12-01), Mase
patent: 5156983 (1992-10-01), Schlesinger et al.
patent: 5177863 (1993-01-01), Lam
patent: 5206986 (1993-05-01), Arai et al.
patent: 5355283 (1994-10-01), Marrs et al.
patent: 5396701 (1995-03-01), Russell
patent: 5490324 (1996-02-01), Newman
patent: 5604161 (1997-02-01), Barber
patent: 5640048 (1997-06-01), Selna
patent: 5787575 (1998-08-01), Banjeree et al.
patent: 5798571 (1998-08-01), Nakajima
Arbes Carl J.
Faatz Cynthia T.
Intel Corporation
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