Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-03-14
2002-03-05
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S598000
Reexamination Certificate
active
06352914
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to multi-layer electronic device packages, and more particularly, to routing signal traces in a multi-layer package.
2. Description of Related Art
Multi-layer electronic device packages, such as multi-layer printed circuit boards (“PCBs”) and multi-chip modules (“MCMs”), are well known in the art. Multi-layer packages include a plurality of substrate layers, with at least one of the outer substrate layers of the multi-layer package typically adapted to have electronic components mounted thereon. One or more of the substrate layers has conductive traces incorporated therewith that act as wires to interconnect the components mounted on the package. Other layers may provide power and ground connections to the components.
Incorporating conductive traces in multiple substrate layers allows circuit designers to lay out complex circuit designs using numerous interconnections between components, while minimizing the required surface area of the package. Electrical connections between the various substrate layers of the package, and between layers of the package and components mounted on the package, is achieved using “vias.” Basically, a via is a hole extending through substrate layers that is filled with conductive material to form an electrical connection.
Multi-layer packages are used extensively in computer systems and other semiconductor applications. The conductive traces of the multi-layer package may be used to route signals between components coupled to the package. Routing a high number of signals in a small area—especially high-speed signals—creates problems with parasitic noise generated from the signals routed through adjacent traces. This is especially problematic when multiple signal layers are employed for routing signals. This parasitic noise, sometimes also called “cross-talk,” may result in spurious logic errors.
The present invention addresses some of the above mentioned and other problems of the prior art.
SUMMARY OF THE INVENTION
In one aspect of the invention, multi-layer electronic device package includes first and second outer layers and at least one signal layer disposed between the outer layers. The signal layer includes signal traces and ground traces interleaved with the signal traces.
In another aspect of the invention, a method of routing signal traces in an electronic device package includes the acts of disposing a plurality of signal traces in at least one substrate layer, and interleaving a plurality of ground traces with the signal traces.
In a further aspect of the invention, a semiconductor device includes a first semiconductor die, a second semiconductor die, and a multi-layer package, with the first die and the second die mounted on the multi-layer package. The multi-layer package defines at least one signal layer. Each signal layer includes signal traces and ground traces interleaved therewith, with the signal traces interconnecting the first die and the second die.
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Database WPI, Week 9710, Derwent Publications Ltd., London, GB; AN 97-106325; XP002079142 & KR 9 503 803 A (Tong Yang Nylon Co Ltd, ). Apr. 20, 1995.
Ball Zane A.
Clark Lawrence T.
Gutman Aviram
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Niebling John F.
Zarneke David A.
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