Boots – shoes – and leggings
Patent
1994-06-29
1996-10-01
An, Meng-Ai
Boots, shoes, and leggings
395800, 3642281, 3642287, 3642288, 3642319, 36423221, 3642384, 364243, 3642434, 36424341, 364246, 3642463, 3642464, 3642592, 364DIG1, 3649314, 36493151, 36493152, 3649642, 3649664, G06F 934, G06F 1210
Patent
active
055617840
ABSTRACT:
A method of accessing common memory in a cluster architecture for a highly parallel multiprocessor scaler/factor computer system using a plurality of segment registers in which is first determined whether a logical address is within a start and end range as defined by the segment registers and then relocating the logical address to a physical address using a displacement value in another segment register.
REFERENCES:
patent: 3510844 (1966-07-01), Aranyi et al.
patent: 3618045 (1971-11-01), Campbell
patent: 3676861 (1972-07-01), Ruth
patent: 3854126 (1974-12-01), Gray et al.
patent: 3889237 (1975-06-01), Alferness et al.
patent: 3916383 (1975-10-01), Malcolm
patent: 4009470 (1977-02-01), Danilenko et al.
patent: 4028664 (1977-06-01), Monahan et al.
patent: 4044333 (1977-08-01), Ausperg et al.
patent: 4124889 (1978-11-01), Kaufman et al.
patent: 4130865 (1978-12-01), Heart et al.
patent: 4163280 (1979-07-01), Mori et al.
patent: 4200930 (1980-04-01), Rawlings
patent: 4228496 (1980-10-01), Katzman et al.
patent: 4229791 (1980-10-01), Levy et al.
patent: 4240143 (1980-12-01), Besemer
patent: 4257095 (1981-03-01), Nadir
patent: 4296468 (1981-10-01), Bandoh et al.
patent: 4314335 (1982-02-01), Pezzi
patent: 4351025 (1982-09-01), Hall
patent: 4356550 (1982-10-01), Katzman et al.
patent: 4363096 (1982-12-01), Comfort et al.
patent: 4365292 (1982-12-01), Barnes et al.
patent: 4365295 (1982-12-01), Katzman et al.
patent: 4392200 (1983-07-01), Arulpragasam et al.
patent: 4400768 (1983-08-01), Tomlinson
patent: 4418382 (1983-11-01), Larson et al.
patent: 4445171 (1984-04-01), Neches
patent: 4449183 (1984-05-01), Flahive et al.
patent: 4453214 (1984-06-01), Adcock
patent: 4473880 (1984-09-01), Budde et al.
patent: 4484262 (1984-11-01), Sullivan et al.
patent: 4488256 (1984-12-01), Zolnowsky et al.
patent: 4499538 (1985-02-01), Finger et al.
patent: 4543630 (1985-09-01), Neches
patent: 4563738 (1986-01-01), Klan
patent: 4636942 (1987-01-01), Chen et al.
patent: 4667287 (1987-05-01), Allen et al.
patent: 4672535 (1987-06-01), Katzman et al.
patent: 4707781 (1987-11-01), Sullivan et al.
patent: 4718006 (1988-01-01), Nishida
patent: 4719569 (1988-01-01), Ludemann et al.
patent: 4720780 (1988-01-01), Dolecek
patent: 4724518 (1988-02-01), Steps
patent: 4729095 (1988-03-01), Colley et al.
patent: 4745545 (1988-05-01), Schiffleger
patent: 4754398 (1988-06-01), Pribnow
patent: 4763244 (1988-08-01), Moyer et al.
patent: 4774659 (1988-09-01), Smith et al.
patent: 4785414 (1988-11-01), Hemdal
patent: 4807116 (1989-02-01), Katzman et al.
patent: 4816990 (1989-03-01), Williams
patent: 4834483 (1989-05-01), Arthurs et al.
patent: 4845609 (1989-07-01), Lighthart et al.
patent: 4845722 (1989-07-01), Kent et al.
patent: 4873626 (1989-10-01), Gifford
patent: 4891751 (1990-01-01), Call et al.
patent: 4894769 (1990-01-01), Conforti
patent: 4901230 (1990-02-01), Chen et al.
patent: 4905145 (1990-02-01), Sauber
patent: 4920484 (1990-04-01), Ranade
patent: 4920485 (1990-04-01), Vahidsafa
patent: 4924375 (1990-05-01), Fung et al.
patent: 4924380 (1990-05-01), McKinney
patent: 4926316 (1990-05-01), Baker et al.
patent: 4937733 (1990-06-01), Gillett, Jr. et al.
patent: 4945479 (1990-07-01), Rusterholz
patent: 4947368 (1990-08-01), Donaldson et al.
patent: 4964037 (1990-10-01), Woods et al.
patent: 4972342 (1990-11-01), Davis et al.
patent: 4992936 (1991-02-01), Katada et al.
patent: 5010476 (1991-04-01), Davis
patent: 5016162 (1991-05-01), Epstein et al.
patent: 5016167 (1991-05-01), Nguyen et al.
patent: 5051889 (1991-09-01), Fung et al.
patent: 5053942 (1991-10-01), Srini
patent: 5081575 (1992-10-01), Hiller et al.
patent: 5109334 (1992-04-01), Kamuro
patent: 5109521 (1992-04-01), Culley
Burroughs B6700 Information Processing Systems, Reference Manual, Burroughs Corporation, 1969, 1970, 1972.
G. Almasi and A. Gottlieb, Highly Parallel Computing, Benjamin Cummings Publishing Co., Chpt. 8, pp. 278-299 (1989).
Hennesy, Jr. and D. Patterson, Computer Architecture: A Quantitative Approach, Mogan Kaufman Publ. Inc., San Mateo. Calif., Chapter 10, "Future Directions", pp. 570-592 (1990).
K. Murakami, et al: An Overview of the Kyushi University Reconfigured Parallel Processor, pp. 130-137 (Aug. 1988).
A. Seznac, Y. Jegou, Synchronizing Processors Through Memory Requests in a Tightly Coupled Multiprocessor, Proceedings on the 1988 International Conference on Parallel Processing, IEEE. pp. 393-400 (Feb. 1988).
D. Naedal, Closely Coupled Asynchronous Hierarchial and parallel Processing in an Open Architecture, Conference Proceedings for the 12th Annual International Symposium on Computer Architecture, pp. 215-220, (Jun. 1985).
E. Clementi, D. Logan, J. Saarinen, ICAP/3090: Parallel Processing For Large-Scale Scientific and Engineering Problems, IBM Systems Journal, vol. 27, No. 4, pp. 475-509 (1988).
J. Goodman and P. Woest, The Wisconsin Multicube: A New Large-Scale Cache-Coherent Multiprocessor, Proceedings on the 1988 International Conference on Parallel Processing, IEEE, pp. 422-431 (Feb. 1988).
ETA 10 System Overview: EOS, Tech. Note, Publ. 1006, Rev. B. ETA Systems (Sep. 30, 1988).
G. Pfister, The IBM Research Parallel Processor Prototype (RP3): Introduction and Architecture, International Conference on Parallel Processing, pp. 764-771 (Aug. 1985).
P. Mark, The Sequioa Computer: A Fault-Tolerant Tightly Coupled Multiprocessor Architecture, Conference Proceedings for the 12th Annual International Symposium on Computer Architecture, p. 232 (Jun. 1985).
K. Hwang and D. DeGroot, Parallel Processing for Supercomputers and Artificial Intelligence, McGraw Hill , Chapter 2, pp. 31-67 (1989).
R. Kain, Computer Architecture, Prentice Hall, vol. 1, Chapter 3, pp. 178-250 (1989).
David J. Kuck, et al., Parallel Supercomputing Today and the Cedar Approach, Science, vol. 231, pp. 967-974 (Feb. 1986).
William J. Dally; "A Fast Translation Method for Paging on Top of Segmentation"; IEEE Transaction on Computer, vol. 41, No. 2, Feb. 1992.
Beard Douglas R.
Chen Steve S.
Eckert Roger E.
Miller Edward C.
Simmons Frederick J.
An Meng-Ai
Cray Research Inc.
LandOfFree
Interleaved memory access system having variable-sized segments does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Interleaved memory access system having variable-sized segments , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Interleaved memory access system having variable-sized segments will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1509240