Interleaved coder and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S780000

Reexamination Certificate

active

06973611

ABSTRACT:
Turbo encoder with even-odd bit interleaving for upper and lower component convolutional encoders and symbol-level interleaving after mapping to modulation symbols plus symbol-level buffer for both ARQ and Turbo decoding.

REFERENCES:
patent: 5559561 (1996-09-01), Wei
patent: 6031874 (2000-02-01), Chennakeshu et al.
patent: 6188717 (2001-02-01), Kaiser et al.
patent: 6308294 (2001-10-01), Ghosh et al.
patent: 6392572 (2002-05-01), Shiu et al.
Barbulescu et al., “Terminating the Trellis of Turbo-Codes in the Same State”, Electronics Letters, Jan. 5, 1995, vol. 31, No. 1, pp. 22-23.
Robertson et al., “Extensions of Turbo Trellis Coded Modulation to High Bandwidth Efficiencies”, IEEE ICC '97, Jun. 8-12, 1997, vol. 3, pp. 1251-1255.
Rowitch et al., “On the Performance of Hybrid FEC/ARQ Systems Using Rate Compatible Punctured Turbo (RCPT) Codes”, IEEE Transactions on Communications, vol. 48, No. 6, Jun. 2000, pp. 948-959.
Khalegi et al., “On Symbol-based Turbo Codes for cdma2000”, IEEE WCNC 1999, Sep. 21-24, 1999, pp. 471-475.

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