Interleaved analog metric calculator

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Details

C714S796000

Reexamination Certificate

active

06178538

ABSTRACT:

BACKGROUND OF THE PRESENT INVENTION
1. Field of the Invention
The present invention relates to the field of digital transmission through analog channels and, more particularly, to a method and apparatus for calculating metrics in a maximum likelihood detector for decoding a sequence of signals received through analog channels.
2. Background Art
Communication of voice and data signals is often accomplished by converting analog signals to digital signals. These digital signals are then transmitted from a transmitting device to a receiving device, converted back to analog signals, if necessary, and subsequently communicated to a user. This type of digital transmission is often performed through analog transmission channels. Digital information through this analog channel is transmitted in the form of “symbols” representing digital values. In some cases, adjacent symbols can overlap, resulting in a phenomenon known as intersymbol interference. This interference may corrupt a digital transmission, leading to errors in the receipt of the digital information.
These types of errors in transmission of digital information occur in many instances, including in magnetic recording channels. Such channels may suffer from intersymbol interference as well as noise present during transmission, and therefore require a method for decoding the binary symbol sequences that they output in a possibly corrupted form. Those skilled in the art are familiar with a decoding technique called maximum likelihood sequence estimation (MLSE), which is an effective tool used in conjunction with pulse detectors for receiving and decoding digital transmissions that suffer from intersymbol interference and noise. Maximum likelihood detection is especially useful with partial response signaling, for example class IV partial response signaling, in which the ideal response of a magnetic recording channel is modeled. Using the idealized response, and accounting for the effects of noise, maximum likelihood detection retrospectively analyzes received signals and determines the most likely sequence of data transmitted through the magnetic recording channel.
Class IV partial response signaling is only one type of partial response signaling currently used. In a class IV partial response, or PR4 system, when a pulse indicating a single magnetization transition occurs, it will ideally result in an impulse equal to “1” at the transition location and another impulse at the next sample period. The second impulse is equivalent to a response given by the operator (1+D). PR4 is a particular case of a more general family of PR polynomials, given by the general equation: (1−D)(1+D)
n
. PR4 corresponds to n=1. Another system, called EPR4, or “Enhanced Partial Response 4,” is provided by setting n=2. In the EPR4 system, the impulse response caused by an isolated transition in a magnetic recording channel may be approximated by the term (1+D)
2
=1+2D+D
2
. When n=3, the impulse response is given by the polynomial (1+D)
3
=1+3D+3D
2
+D
3
. This type of partial response is called E
2
PR4. Because E
2
PR4 is a higher order polynomial, it provides the closest fit to the magnetic channel frequency response, and is therefore a better predictor of the actual response of the magnetic channel. An embodiment of a metric calculator according to the present invention is disclosed with respect to the EPR4 system. However, it will be understood by those skilled in the art that the invention can also be applied to other systems, including PR4 and E
2
PR4 systems.
Various implementations of maximum likelihood sequence estimation, in particular, the Viterbi algorithm, are well known in the art. Several of these implementations are discussed in U.S. Pat. No. 5,384,560, assigned to the assignee of the present application. A brief explanation of the EPR4 Viterbi detector is given here to facilitate the explanation of the present invention. A more complete explanation of the EPR4 Viterbi detector is provided in G. David Forney, Jr., “Maximum-Likelihood Sequence Estimation of Digital Sequences in the Presence of Intersymbol Interferences,” IT-18 IEEE Transactions on Information Theory, 363 (May 1972), incorporated herein by reference.
The EPR4 Viterbi detector is a sequence detector for a signal channel whose response is characterized by the following EPR4 equation:
(1
−D
)(1
+D
)
2
=(1
−D
)(1+2
D+D
2
),
where D is a delay operator representing one unit of delay or code period Tc. Using this equation, the Viterbi detector attempts to derive data that it computes to be most likely from a sequence of received signals.
The EPR4 channel is completely characterized by transitions associated with three binary bits: the current data bit (I
k
), one bit just prior to it Ik-
1
, and another bit that is two code periods (2Tc) earlier Ik-
2
. It will be apparent to these skilled in the art that these three binary bits (Ik, Ik-
1
, Ik-
2
) fully describe one of the eight states in which the channel can be at time k. The EPR4 Viterbi detector assigns a measure of likelihood to all eight states at every code period, and derives data from the state that is determined to be most likely. As is known in the art, the value that is computed as a measure of likelihood is called a metric.
FIGS.
1
(
a
)-
1
(
d
) are timelines illustrating a simple example of an EPR4 channel response. In the timeline shown in FIG.
1
(
a
), the signal Iw represents a sequence of binary data input to the EPR4 channel. This signal can represent an input sequence 0011000, for example, after the data is processed in a read channel circuit and output as the current of a write flip flop circuit. At time k, the write current transitions from one to zero, or from high to low. In the ideal case where there is no noise, this transition generates an overall EPR4 response of X
k
=0, shown at time=k in FIG.
1
(
d
).
The timeline in FIG.
1
(
b
) illustrates the (1−D) response to signal Iw, representing the differentiation process associated with the magnetic transition caused by the write current Iw onto the media.
The timeline in FIG.
1
(
c
) is the PR4 response of the channel characterized by the multiplication of an additional (1+D) operator to the (1−D) differentiation signal. As can be seen from the figure, this is equivalent to time-shifting the (1−D) response by a unit delay, and adding the result to the (1−D) response. This function approximates the “spreading” of the magnetic transition of the FIG.
1
(
a
) timeline over neighboring bit periods in a PR4 system.
Finally, the timeline in FIG.
1
(
d
) shows the EPR4 response, which is obtained by further multiplying the PR4 response with yet another (1+D) operator. This response characterizes the response of the EPR4 channel for the signal shown in the FIG.
1
(
a
) timeline. As can be seen from FIGS.
1
(
a
) and
1
(
d
), the ideal overall EPR4 response of X
k
, in the absence of noise, for a transition from state “3” (011) to state “6” (011), at time k, is equal to zero.
FIGS.
2
(
a
)-
2
(
d
) are timelines illustrating another simple example of an EPR4 channel response. In the timeline shown in FIG.
2
(
a
), the signal Iw represents binary data input sequence of 0111000, outputted as current by the output of a flip flop in a read channel. As in FIG.
1
(
b
), the timeline in FIG.
2
(
b
) illustrates the (1−D) differentiation response to signal Iw. The timeline in FIG.
2
(
c
) illustrates the PR4 response of the channel characterized by the multiplication of an additional (1+D) operator to the (1−D) differentiation signal. Finally, the timeline in FIG.
2
(
d
) shows the EPR4 response for 0111000, obtained by further multiplying the PR4 response with another (1+D) operator.
As in FIG.
1
(
a
), the timeline in FIG.
2
(
a
) shows the write current transitioning from one to zero at time=k. However, the transition of the signal from state “7” or 111,

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