Intergrated circuit and a method of cache remapping

Details Intergrated circuit and a method of cache remapping Intergrated circuit and a method of cache remapping

2004-08-17

2010-11-02

Elmore, Stephen C (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S003000, C711S118000, C711S128000, C714S006130

Reexamination Certificate

active

07827372

ABSTRACT:
An integrated circuit is provided with at least one processing unit (TM), a cache memory (L2 BANK) having a plurality of memory modules, and remapping means (RM) for performing an unrestricted remapping within said plurality of memory modules. Accordingly, faulty modules can be remapped without limitations in order to optimise the utilization of the memory modules by providing an even distribution of the faulty modules.

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