Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2007-08-15
2010-06-22
Rinehart, Mark (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S107000, C370S218000, C370S395420, C370S474000, C370S902000, C718S107000
Reexamination Certificate
active
07743196
ABSTRACT:
Preemption techniques are disclosed which permit multiple high-priority packets to preempt a single low-priority packet. In one aspect, a first device is configured for communication with a second device via an interface bus. The first device comprises interface circuitry configured to receive from the second device a start indicator of a first type and a start indicator of a second type, and to allow at least one data segment associated with the start indicator of the second type to preempt at least one data segment associated with the start indicator of the first type. The start indicator of the second type may have a longer pulse width than that of the start indicator of the first type, such as a double-length pulse width. The first and second devices may comprise physical layer and link layer devices of a communication system.
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Agere Systems Inc.
Misiura Brian T
Rinehart Mark
Ryan & Mason & Lewis, LLP
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