Interface in a semiconductor integrated circuit

Details Interface in a semiconductor integrated circuit Interface in a semiconductor integrated circuit

1996-06-03

1998-03-10

Hudspeth, David R.

Electronic digital logic circuitry

Interface

Current driving

326 34, 326 81, H03K 1716

Patent

active

057265909

ABSTRACT:
A three-state buffer operating at a 3V power source supplies a three-state signal to a bus line pulled up to a 5V power source line. The three-state buffer includes CMOS transistors each receiving an output signal from a pre-stage buffer arid a transfer gate connected between the output of the CMOS transistors and the output terminal of the integrated circuit. The back-gate of the p-channel transistor of the CMOS is maintained at an intermediate potential between the 3V source line and the ground line while being in a floating state. The intermediate potential is presented by a serial three transistors. A low power dissipation and a high speed operation can be obtained by the circuit.

REFERENCES:
patent: 5144165 (1992-09-01), Dhong et al.
patent: 5151619 (1992-09-01), Austin et al.
patent: 5442307 (1995-08-01), Shigehara et al.
patent: 5539335 (1996-07-01), Kobayashi et al.
patent: 5574389 (1996-11-01), Chu
patent: 5635861 (1997-06-01), Chan et al.
patent: 5646550 (1997-07-01), Campbell, Jr. et al.

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