Interface circuit and control method thereof

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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C326S026000, C326S090000

Reexamination Certificate

active

07579875

ABSTRACT:
This invention provides an interface circuit for detecting that a DQS signal from a DDR SDRAM is at an intermediate potential. An interface circuit is connected to at least a signal line which transmits the DQS signal from the DDR SDRAM and reaches an intermediate potential VM when the signal attains an inactive state. The interface circuit has a comparing portion for comparing the potential of the DQS with a threshold potential VREFH which is a potential that is different from the intermediate potential VM.

REFERENCES:
patent: 5856750 (1999-01-01), Koseki
patent: 6753701 (2004-06-01), Chang
patent: 6798264 (2004-09-01), Swanson et al.
patent: 2005/0134340 (2005-06-01), Lee
patent: 9-213884 (1997-08-01), None

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