Interface circuit

Details Interface circuit Interface circuit

2006-02-21

2006-02-21

Elamin, A. (Department: 2116)

Electrical computers and digital processing systems: support

Clock control of data processing system, component, or data...

C713S400000, C713S401000, C713S500000, C713S503000, C365S233100

Reexamination Certificate

active

07003686

ABSTRACT:
An interface circuit according to one embodiment of the present invention includes a clock signal, a first phase locked loop coupled to the clock signal line and generating a reference clock signal, a second phase locked loop receiving the reference clock signal, and in accordance therewith, generating one or more phase shifted reference clock signals, and a data transceiver circuit coupled to receive at least one of the clock signal, the reference clock signal, or one or more of the phase shifted reference clock signals to control the flow of data between a first circuit and a second circuit. An interface circuit according to one embodiment of the invention can be used advantageously for controlling the flow of data between a CPU and an external memory.

REFERENCES:
patent: 6003118 (1999-12-01), Chen
patent: 6469555 (2002-10-01), Lau et al.
patent: 6552958 (2003-04-01), Shikata et al.
patent: 6798257 (2004-09-01), Roe
patent: 6839860 (2005-01-01), Lin
patent: 2003/0014681 (2003-01-01), McBride et al.

Affiliated with

Also associated with

Rating

Interface circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Interface circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Interface circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3668530