Interface bus optimization for overlapping write data

Details Interface bus optimization for overlapping write data Interface bus optimization for overlapping write data

2006-07-11

2006-07-11

Perveen, Rehana (Department: 2112)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S039000, C710S305000, C710S107000

Reexamination Certificate

active

07076593

ABSTRACT:
Embodiments of the present invention are devices with a queue for receiving a plurality of data write requests and having a means for comparing the data write requests in the queue and then requesting only data identified by the data write requests that would not be overwritten by any later received data write requests in the queue. By requesting only the data that is not overwritten by subsequent data write requests, the data actually transferred over the bus is minimized given the current queue of data write requests. One aspect of the present invention includes a method of requesting data from a host over a data bus.

REFERENCES:
patent: 5224214 (1993-06-01), Rosich
patent: 5963474 (1999-10-01), Uno et al.
patent: 6112319 (2000-08-01), Paulson
patent: 6374332 (2002-04-01), Mackenthun et al.
patent: 6526484 (2003-02-01), Stacovsky et al.

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