Interface arrangement for a system on a chip suitable for...

Details Interface arrangement for a system on a chip suitable for... Interface arrangement for a system on a chip suitable for...

2006-06-06

2010-11-16

Phan, Raymond N (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S308000, C710S310000

Reexamination Certificate

active

07836240

ABSTRACT:
An interface arrangement (24) is disclosed that provides an interface between a signal line (5) for connecting external peripheral devices and a microcontroller bus (3). Data input and output interfaces (1, 2; 4) are provided for connecting corresponding register units (6, 7) to the bus systems (3, 5) and are connected through a buffer memory (8). This is, moreover, coupled with a direct memory access (DMA) controller (9). A control signal generator is also provided for the flexible generation of control signals (10). The proposed arrangement thus permits a high data transfer rate when operating peripheral devices with a system-on-chip, without demanding computing time from the microcontroller.

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ARM Limited, ARM PrimeCell General Purpose Input/Output (PL061) Technical Reference Manual, 2000.
ARM Prime Cell™, General Purpose Input/Output (PL 061), Technical Reference Manual, ARM Limited pp. 2-4, 2000.

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