Interface apparatus

Details Interface apparatus Interface apparatus

2007-10-02

2007-10-02

Myers, Paul R. (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S301000, C710S104000

Reexamination Certificate

active

10381311

ABSTRACT:
A memory card (1) is provided with data terminals (DATA0/SDIO, DATA1, DATA2, DATA3) for making two-way communication of 4-bit parallel data with a host apparatus on four data communication lines, a clock terminal (SCLK) for receiving a clock from the host apparatus, and a terminal (BS) for receiving, from the host apparatus, a bus-state signal indicating the states of the 4-bit parallel data communication lines and transfer start timing. The first data terminal (DATA0/SDIO) is used as a data terminal for a memory card intended for 1-bit data communication to maintain the compatibility with this memory card.

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