Interconnector for a multi-chip module or package

Details Interconnector for a multi-chip module or package Interconnector for a multi-chip module or package

1993-01-28

1994-06-28

Picard, Leo P.

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

361723, 361748, 361760, 361807, 174 521, 174255, 257666, 257690, H05K 710

Patent

active

053252683

ABSTRACT:
Integrated circuits having electrical interconnection in a multi-chip module or package is provided. Connections involving topological cross overs are achieved in the absence of multi-layers of metalization or vias. A plurality of metal traces in a single metalization layer are provided. Wire bonding issued to connect pads from two or more chips to a common metalization trace. Because the wire bonds can be vertically spaced from substrate traces, crossover connections can be achieved without an unwanted contact between traces and pads. A similar scheme can be used to provide connection to substrate pads.

REFERENCES:
patent: 3676748 (1972-07-01), Kobayashi et al.
patent: 3872583 (1975-03-01), Beall et al.
patent: 3890636 (1975-06-01), Harada et al.
patent: 3955269 (1976-05-01), Magdo et al.
patent: 4079511 (1978-03-01), Grabbe
patent: 4115837 (1978-09-01), Beall et al.
patent: 4132856 (1979-01-01), Hutchinson et al.
patent: 4296456 (1981-10-01), Reid
patent: 4320438 (1982-03-01), Ibrahim et al.
patent: 4340902 (1982-07-01), Honda
patent: 4396971 (1983-08-01), Beall et al.
patent: 4475007 (1984-10-01), Ohno
patent: 4484388 (1984-11-01), Iwasaki
patent: 4507847 (1985-04-01), Sullivan
patent: 4513355 (1985-04-01), Schroeder et al.
patent: 4536945 (1985-08-01), Gray et al.
patent: 4551746 (1985-11-01), Gilbert et al.
patent: 4567545 (1986-01-01), Mettler, Jr.
patent: 4578697 (1986-03-01), Takemae
patent: 4609568 (1986-09-01), Koh
patent: 4630172 (1986-12-01), Stenerson et al.
patent: 4654694 (1987-03-01), Val
patent: 4677526 (1987-06-01), Muehling
patent: 4705917 (1987-11-01), Gates, Jr. et al.
patent: 4764480 (1988-08-01), Vora
patent: 4795722 (1989-01-01), Welch et al.
patent: 4801765 (1989-01-01), Moyer et al.
patent: 4829025 (1989-05-01), Iranmanesh
patent: 4839717 (1989-06-01), Phy et al.
patent: 4866504 (1989-09-01), Landis
patent: 4872260 (1989-10-01), Johnson et al.
patent: 4879588 (1989-11-01), Ohtsuka et al.
patent: 4890155 (1989-12-01), Miyagawa et al.
patent: 4891687 (1990-01-01), Mallik et al.
patent: 4897364 (1990-01-01), Nguyen
patent: 5014419 (1991-05-01), Cray et al.
Brassington et al., "An Advanced Single-Level Polysilicon Submicrometer BiCMOS Technology," IEEE Trans. Elect. Devices (1989) pp. 712-719.
Momose et al., "1 .mu.m n-well CMOS/Bipolar Technology," IEDM Transactions (Feb. 1985) p. 217.
Kapoor et al., "A High Speed High Density Single-Poly ECL Technology for Linear/Digital Applications," 1985 Custom Integrated Circuits Conference.
Gomi et al., "A Sub-30psec Si Bipolar LSI Technology," IEDM Technical Digest (1988) pp. 744-747.
H. Takemura, et al., "BSA Technology for Sub-100mn Deep Base Bipolar Transistors," IEDM Technical Digest, pp. 375-377 (1987).
Kuang Yi Chiu, et al., "A Bird's Beak Free Local Oxidation Technology Feasible to VSLI Circuits Fabrication," IEEE Transactions on Electron Devices, vol. ED-29, No. 4, pp. 536-540, Apr. 1982.

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