Interconnections to copper IC's

Details Interconnections to copper IC's Interconnections to copper IC's

2000-04-10

2003-09-16

Zarabian, Amir (Department: 2822)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S613000, C438S614000, C438S652000, C438S653000, C438S656000

Reexamination Certificate

active

06620720

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to integrated circuit packages with copper metallization and wire bond or solder bump bond interconnections.
BACKGROUND OF THE INVENTION
Wire bonding has been used in integrated circuit packaging since the inception of IC technology. Wire bonding techniques and wire bonding machines have been refined to the point where wire bonds are relatively inexpensive and are highly reliable. However, wire bonds are rapidly being replaced by more advanced packaging approaches, partly because wire bonds require greater pitch than is available in many state of the art packages.
Among the common IC interconnection methods is flip-chip bonding where high pin count IC chips are flip-chip bonded to a printed wiring board or where the IC chip is flip-chip bonded to a silicon intermediate interconnect substrate, and the silicon intermediate interconnect substrate is in turn ball bonded or flip-chip bonded to a printed wiring board. In many cases these packages use recessed chip arrangements to reduce the package profile.
In these advanced packaging approaches, interconnection pitches can be very small. The earlier technology of wire bonding is being replaced for many applications where the high density of I/O's in current IC chips presents a challenge to the capacity of wire bond techniques. However, due to the high I/O density of state of the art IC chips, packaging yield using advanced packaging techniques may suffer, and the complexity of the packaging process is increased. As a result the overall cost per bond may be relatively high. The low cost and high reliability of wire bonds makes them attractive if ways can be found to adapt wire bonding to packaging high density I/O chips.
Interconnection technology faces a new challenge with the introduction of copper metallization in semiconductor IC devices. Copper has long been an attractive candidate as an interconnection material because of its low cost and high conductivity. However, copper is electrochemically active, and migrates in an electrical environment. It also forms undesirable alloys with common materials used in ICs. These assumed drawbacks have limited the introduction of copper metallization in IC manufacture. However, the conductivity advantage that copper presents is so compelling in state of the art high frequency devices that copper has new impetus as a replacement for aluminum in IC chip interconnections.
With the replacement of aluminum with copper, particularly at the last interconnect level which interfaces the chip to the next board level interconnection, new considerations for interconnection arise. Whereas with aluminum chip interconnections, wire bonding was highly developed and relatively straightforward, solder bump bonding to aluminum was not. Solder bump bonding required special under bump metallization (UBM) for the aluminum pads due to the difficulty in soldering directly to aluminum. With copper replacing aluminum, the situation is somewhat reversed. In principal, from a soldering standpoint, solder bump bonds can be made directly to the top copper metallization level. However, it has been recognized that solder bump bonding directly to copper IC chip metallization does not overcome the copper migration problem. Thus, effective UBM technologies for solder bumps on copper metallization are sought. The primary function of this UBM, in contrast to the UBM used on aluminum metallization, is to form a barrier against copper migration.
In addition, the introduction of copper metallization in state of the art IC production requires new approaches to wire bonding. The straightforward solution is to form aluminum wire bonds pads directly on the top copper metallization level. But again, this approach fails to control the problem of copper migration.
Since, as indicated above, it continues to be desirable to use both wire bond interconnections and solder bump interconnections with the new technology of copper metallized IC devices, it would be useful to develop a solution to the copper migration problem that is compatible with, and effective for, both interconnect strategies.
STATEMENT OF THE INVENTION
We have developed an interconnection metallurgy that can be used effectively for both wire bonding and solder bump bonding to copper metallization. It relies on primarily on an initial Ti/Ni stack over the copper surface. For wire bonding applications, an aluminum layer is deposited on the Ni layer forming a Ti/Ni/Al stack. For solder bump bonding, a copper layer is deposited on the Ni layer forming a Ti/Ni/Cu stack. An advantageous strategy is to process all wafers with an initial Ti/Ni stack. Wafers that are to be wire bonded are processed using an aluminum target for the last sputtered layer, and wafers that are to be solder bump bonded are processed using a copper target for the last sputtered layer. For some applications, substitution of chromium for titanium as the initial layer in the stack is effective.


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patent: 5508229 (1996-04-01), Baker
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