Interconnections having double capping layer and method for...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S627000, C438S631000

Reexamination Certificate

active

07037835

ABSTRACT:
Provided are an interconnection of a semiconductor device which includes a capping layer and a method for forming the interconnection. The interconnection of the semiconductor device is a copper damascene interconnection where the capping layer is formed as a dual layer of a silicon nitride layer and silicon carbide layer on a copper layer processed by chemical mechanical polishing (CMP). Therefore, it is possible to maintain a high etching selectivity and a low dielectric constant of the silicon carbide layer while providing superior leakage suppression.

REFERENCES:
patent: 6465888 (2002-10-01), Chooi et al.
patent: 6756321 (2004-06-01), Ko et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Interconnections having double capping layer and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Interconnections having double capping layer and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Interconnections having double capping layer and method for... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3561751

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.