Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-05-22
2007-05-22
Smith, Matthew S. (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S629000
Reexamination Certificate
active
10944684
ABSTRACT:
An electronic component includes an interposer substrate and at least one semiconductor chip mounted on the interposer substrate. A plurality of electrical connections electrically couple a rewiring of the interposer substrate to contact regions of the at least one semiconductor chip. A plurality of connection elements are positioned for electrical contact-connection with a printed circuit board. The interconnection elements comprise hollow-cylindrical or rod-shaped elements that penetrate through and are fixedly connected to the interposer substrate.
REFERENCES:
patent: 4468615 (1984-08-01), Jamet et al.
patent: 4554505 (1985-11-01), Zachry
patent: 5665650 (1997-09-01), Lauffer et al.
patent: 5808474 (1998-09-01), Hively et al.
patent: 6080668 (2000-06-01), Lauffer et al.
patent: 6321443 (2001-11-01), Barte et al.
patent: 6330744 (2001-12-01), Doherty et al.
patent: 6416332 (2002-07-01), Carron et al.
patent: 6428327 (2002-08-01), Tamarkin et al.
patent: 6468098 (2002-10-01), Eldridge
patent: 6541872 (2003-04-01), Schrock et al.
patent: 2001/0020071 (2001-09-01), Capote et al.
patent: 2002/0042639 (2002-04-01), Murphy-Chutorian et al.
patent: 2002/0121911 (2002-09-01), Yang et al.
patent: 2003/0006790 (2003-01-01), Holcombe
patent: 2004/0038496 (2004-02-01), Lee et al.
patent: 2004/0170795 (2004-09-01), Hass et al.
patent: 198 33 131 (2000-04-01), None
patent: 0 996 154 (2000-04-01), None
patent: 07-106491 (1995-04-01), None
patent: 2001-015227 (2001-01-01), None
patent: 2002-151627 (2002-05-01), None
patent: WO 97/00598 (1997-01-01), None
patent: WO 02/09194 (2002-01-01), None
Dobritz Stephan
Hanke Andre
Slater & Matsil L.L.P.
Smith Matthew S.
LandOfFree
Interconnection element for BGA housings and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Interconnection element for BGA housings and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Interconnection element for BGA housings and method for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3824779