Interconnection architecture for managing multiple low...

Details Interconnection architecture for managing multiple low... Interconnection architecture for managing multiple low...

2005-12-13

2005-12-13

Marcelo, Melvin (Department: 2662)

Multiplex communications

Pathfinding or routing

Combined circuit switching and packet switching

C370S401000

Reexamination Certificate

active

06975623

ABSTRACT:
A data communication architecture including a plurality of devices having input/output (I/O) ports supporting communication at a first rate and a data processor having a number of I/O ports where each I/O port supports data communication at a second data rate. The second data rate is at least double the first data rate. A communication link coupled to one of the data processor I/O ports supports the second data rate. A bridge device is coupled to the communication link and to the I/O ports of the plurality of devices. The bridge device translates the communication link at the second data rate to a plurality of communication links at the first data rate, where the plurality of communication links at the first data rate are substantially independent of each other.

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