Fishing – trapping – and vermin destroying
Patent
1994-12-22
1997-01-07
Fourson, George
Fishing, trapping, and vermin destroying
437194, 1566441, 148DIG161, H01L 2144
Patent
active
055916759
ABSTRACT:
An interconnecting method for a semiconductor device is disclosed in which a conductive layer containing aluminum is formed on a lower structure formed on a substrate. An insulating layer is formed on the conductive layer. A photoresist pattern for defining a portion where an opening is to be made is formed on the insulating layer. Then, the insulating layer is isotropically etched by wet etching with the photoresist pattern as an etching mask. The insulating layer remaining after the isotropical etching is taper-etched by RIE to form the opening. To ensure that the conductive layer is exposed by the opening, the resultant structure is overetched by using a mixed gas of fluorocarbon-containing gas and oxygen. This resultant structure is RIE-sputtered using fluorocarbon-containing gas such that polymer or nonvolatile by-products generated when the opening such as a via hole is formed, are completely removed.
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Stanley Wolf, "Silicon Processing for the VLSI Era vol. I" Lattice Press (Calif.) (1986) p. 523.
Kim Jae-woo
Kim Jin-Hong
Kim Joon
Everhart C.
Fourson George
Samsung Electronics Co,. Ltd.
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