Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1999-12-28
2002-12-10
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
06493861
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to microelectronic structures and fabrication methods, and more particularly to microelectronic structures having inductive characteristics and methods of fabricating the same.
BACKGROUND OF THE INVENTION
A requirement of most electronic systems is a regulated source of direct current (DC) voltage. Whether the DC power originates with a battery or has been converted from alternating current (AC) power, a voltage regulator circuit is usually required to provide a steady DC voltage.
FIG. 1
illustrates a simple power supply circuit
100
that includes a voltage regulator. In power supply circuit
100
, the voltage provided by AC voltage source
110
is increased or decreased by transformer
112
to a voltage having a magnitude that is required by the load. The transformed voltage passes through rectifier
114
, which is a set of diodes in FIG.
1
. The voltage is then filtered by capacitive filter
116
. The resulting voltage is regulated by voltage regulator
118
, which can be a discrete component circuit or an integrated circuit voltage regulator. Either way, the output voltage is filtered through inductive filter
120
. The filtered voltage is then supplied to load
122
, which could be, for example, an integrated circuit such as a microprocessor.
To supply voltage to an integrated circuit, transformer
112
, rectifier
114
, capacitive filter
116
, and voltage regulator
118
are typically consolidated into a voltage regulator module (VRM), which is a discrete component that is mounted on a printed circuit (PC) board. Inductive filter
120
typically is a separate component, due to the relatively large size of the inductor.
FIG. 2
illustrates a VRM
202
and an inductive filter
204
located on a PC board
206
of a computer system in accordance with the prior art. To supply power to an integrated circuit, electrical current first travels from the VRM
202
through the inductive filter
204
. The current then travels through traces (not shown) in PC board
206
, and up through socket
208
to pins
210
of an integrated circuit (IC) package
212
. The current continues along traces (not shown) in IC package
212
to connections
214
. Connections
214
make electrical contact with pads (not shown) on the integrated circuit
216
.
The scale and/or location of pins
210
on an IC package
212
may be different from the scale and/or location of pin holes on the socket
208
. Thus, in some systems, an interposer (not shown) exists between the IC package
212
and the socket
208
. The interposer essentially is a small printed circuit board that provides a dimensional interface between the IC package pins
210
and the pin holes of the socket
208
. When an interposer is present, the supplied current must also travel through the interposer to reach the integrated circuit.
A voltage drop occurs between VRM
202
and integrated circuit
216
, due to losses along the path between VRM
202
and integrated circuit
216
. All other things being equal, the farther the distance between VRM
202
and integrated circuit
216
, the larger the voltage drop. At relatively low voltages, this voltage drop is a tolerable effect that is compensated for by providing a VRM that supplies a higher voltage than is actually needed by the integrated circuit. A negative side effect of this strategy, however, is that the VRM may need to be larger than necessary, and power is inefficiently consumed.
Technological advancements in integrated circuit technologies are driving frequency requirements higher, and driving voltages and voltage margins lower. Therefore, it is desirable to reduce the inefficient power consumption caused by the voltage drop between the VRM and the integrated circuit. This reduction in voltage drop can be achieved by moving the VRM and inductive filter as close as possible to the integrated circuit. However, the proximity of the VRM and inductive filter to the integrated circuit is limited by the fact that the VRM and inductive filter must be located on the PC board in prior art systems.
For the reasons stated above and for other reasons stated below, which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a circuit configuration enabling a VRM and inductive filter to be placed closer to the integrated circuit than is possible in prior art systems.
SUMMARY OF THE INVENTION
In one embodiment, a method for forming an interconnected series of plated through hole (PTH) vias begins by providing a dielectric board with a series of PTH vias formed therein. The PTH vias are electrically connected on a top surface and a bottom surface of the dielectric board by a conductive material. Portions of the conductive material are then selectively removed so that adjacent PTH vias are electrically connected by a trace of the conductive material on either the top surface or the bottom surface. The adjacent PTH vias in the series alternate between being electrically connected by a trace on the top surface or electrically connected by a trace on the bottom surface.
In another embodiment, a series of interconnected PTH vias forms an inductive filter that includes a dielectric board having a top surface and a bottom surface, and a series of PTH vias formed in the dielectric board. Conductive material traces exist on the top surface and the bottom surface that electrically connect the PTH vias. Adjacent PTH vias are electrically connected by a trace on either the top surface or the bottom surface, and the adjacent PTH vias in the series alternate between being electrically connected by a trace on the top surface or electrically connected by a trace on the bottom surface.
In yet another embodiment, two series of interconnected PTH vias forms a transformer that includes a dielectric board having a top surface and a bottom surface. A ferromagnetic material pattern forming a core is embedded in the dielectric board, and has a closed-end shape. A first series of interconnected PTH vias is formed in the dielectric board. The PTH vias in the first series and traces of conductive material on the top surface and bottom surface form a first coil-like structure that winds around the core. A second series of interconnected PTH vias is also formed in the dielectric board. The PTH vias in the second series and additional traces of conductive material on the top surface and bottom surface form a second coil-like structure that winds around the core. The first coil-like structure, the second coil-like structure, and the coil form the transformer.
One embodiment can be, an integrated circuit package includes a package having a first series of PTH vias that provide electrical connections between a top surface of the package and a bottom surface of the package. The PTH vias in the first series are electrically connected by conductive material traces on the top surface and the bottom surface, and adjacent PTH vias in the first series alternate between being electrically connected by a trace on the top surface or electrically connected by a trace on the bottom surface. The integrated circuit package also includes an integrated circuit located on the top surface of the package. The integrated circuit contains a circuit which is electrically connected to a PTH via of the first series.
An interposer designed to provide a dimensional interface between an integrated circuit package and a printed circuit board includes a first series of PTH vias that provide electrical connections between a top surface of the package and a bottom surface of the package is provided in one embodiment. The interposer also includes conductive material traces on the top surface and the bottom surface that electrically connect the PTH vias in the first series, where adjacent PTH vias in the first series alternate between being electrically connected by a trace on the top surface or electrically connected by a trace on the bottom surface.
A computer system embodiment is positioned on a printed ci
Figueroa David G.
Li Yuan-Liang
Do Thuan
Intel Corporation
Schwegman Lundberg Woessner & Kluth P.A.
Smith Matthew
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