Interconnect termination for high speed circuits

Details Interconnect termination for high speed circuits Interconnect termination for high speed circuits

1996-04-19

1998-02-03

Harvey, Jack B.

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 30, 326 86, 370420, 327108, 364488, 364578, 333124, 379398, G06F 1500, G06F 1750

Patent

active

057154082

ABSTRACT:
A termination synthesis technique that automatically derives an optimum termination scheme for interconnects in electronic circuits. The termination synthesis technique uses an adaptive partitioning approach to divide a large circuit into separate clusters that can be independently terminated. The technique can thus automatically derive the optimum termination type and location for large and complex circuits.

REFERENCES:
patent: 5031111 (1991-07-01), Chao et al.
patent: 5402485 (1995-03-01), Takato et al.
patent: 5422317 (1995-06-01), Hua et al.
patent: 5430400 (1995-07-01), Herlein et al.
patent: 5572437 (1996-11-01), Rostoker et al.
patent: 5610833 (1997-03-01), Chang et al.
patent: 5617326 (1997-04-01), Yamamoto

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