Interconnect system with error correction

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S785000

Reexamination Certificate

active

06981200

ABSTRACT:
A method for transmission of digital data in a form of data packets through links carrying data packets with error correction, includes the steps of enveloping a sent packet data, first with an error detection scheme, and secondly with an error correction scheme. The error correction applies to both the sent packet data and to the error detection field. If an error in either of these fields occurs, the error correction scheme attempts to correct it. Error correction may fail in which case the packet is dropped. If error correction does not fail, there is still a possibility that there was an error which error correction did not correct correctly, or did not detect at all because the power of the correction scheme was exceeded. In these cases, the error detection scheme provides a method or means to detect such errors and drop the packet. Corresponding interconnect system with error correction, encode and decode for such are also provided.

REFERENCES:
patent: 6026506 (2000-02-01), Anderson et al.
patent: 6389572 (2002-05-01), Garrabrant et al.
patent: 2002/0053062 (2002-05-01), Szymanski
Widmer, A.X., et al, “A DC-Balanced, Partitioned-Block, 8B/10B Transmission Code”, IBM Journal of Research and Development, vol. 27, No. 5, Sep. 1983.
ITU-T, Telecommunication Standardization Sector of ITU, Series V: Data Communication Over the Telephone Network (Error control) Error-correcting procedures for DCEs using asynchronous-to-synchronous conversion, ITU-T Recommendation V. 42 (Oct. 1996).

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