Interconnect system and method of fabrication

Details Interconnect system and method of fabrication Interconnect system and method of fabrication

1995-12-26

1998-06-30

Niebling, John

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

1566561, H01L 21441

Patent

active

057733597

ABSTRACT:
An interconnect system (31) includes an interconnect bump (29) over an under bump metallurgy (25). The under bump metallurgy (25) includes a barrier layer (26) having a barrier material such as titanium, an adhesion layer (28) having an adhesion material such as copper, and a mixture layer (27) having both the barrier material and the adhesion material. The mixture layer (27) is located between the barrier layer (26) and the adhesion layer (28), and the adhesion layer (28) is located between the mixture layer (27) and the interconnect bump (29). The interconnect bump (29) contains solder and is used as an etch mask when patterning the under bump metallurgy (25).

REFERENCES:
patent: 5298459 (1994-03-01), Arikawa et al.
patent: 5310699 (1994-05-01), Chikawa et al.
patent: 5447599 (1995-09-01), Li et al.
patent: 5470787 (1995-11-01), Greer
patent: 5587336 (1996-12-01), Wang et al.

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