Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2002-01-30
2004-03-23
Cao, Phat X. (Department: 2814)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S643000, C438S650000
Reexamination Certificate
active
06709971
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to semiconductor devices, and more particularly to an interconnect structure in a semiconductor device and its process of formation.
BACKGROUND OF THE INVENTION
As the demand for high performance integrated circuit devices continues to increase, designers have reduced circuit geometries in order to obtain improved performance. As the gate lengths of MOS transistors shrink to sub-half-micron dimensions, the switching speed of the transistors increases dramatically. To take full advantage of the increased speed of the transistors, electrical interconnect structures having high electrical conductivity must also be provided. The speed performance of advanced integrated circuit devices is often limited by the electrical conductivity of metal interconnects, which electrically couple the various device components of an integrated circuit.
Electrical conductivity of metal interconnections is extremely important for the integrated circuit (IC) speed. Alloy of aluminum is widely used in microelectronics for metal interconnections. However, aluminum alloy has a relatively low value of electrical conductivity. Copper has much higher conductivity and it has been widely used, because of its higher conductivity, to increase an IC speed in microprocessors. However, copper has a very high diffusion coefficient in silicon. It creates a risk of silicon contamination and destruction of silver devices, even at the room temperature. A number of precautionary measures are implemented to deal with this risk, such as separate tools, segregated manufacturing areas, defensive layers, low processing temperatures, etc. Moreover, the difficulties in implementing copper dry etching leads to the use of chemical mechanical polishing (CMP). CMP copper processing is subject to significant silicon contamination and requires additional cleaning procedures.
Thus, although the usage of copper in metal interconnects significantly improves IC speed, it also makes the manufacturing process more complicated, time consuming and expensive. Therefore, improved interconnects and process of forming the same are highly desirable.
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Kozhukh Michael
Rashkovskiy Oleg
Blakely , Sokoloff, Taylor & Zafman LLP
Cao Phat X.
Doan Theresa T.
Intel Corporation
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