Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2004-08-30
2009-02-24
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07496864
ABSTRACT:
A behavioral synthesis tool for generating an integrated circuit design is described. The behavioral synthesis tool allows a designer to interactively allocate loop configuration information without having to modify a source code description of the integrated circuit. The behavioral synthesis tool reads the source code description and generates a synthesis intermediate format stored in memory. The synthesis tool searches the in-memory synthesis intermediate format to find loops. The loops are then listed in a graphical user interface (GUI) in hierarchical fashion. The GUI also lists loop configuration information associated with the loops, such as loop frequency, loop unrolling and loop pipelining. The GUI allows the designer to modify the loop configuration information without having to update the source code description. Upon completion of modifying the loop configuration information, the designer saves the changes illustrated in the GUI and such changes are effectuated by automatically updating the synthesis intermediate format.
REFERENCES:
patent: 6611952 (2003-08-01), Prakash et al.
patent: 6691301 (2004-02-01), Bowen
patent: 6701501 (2004-03-01), Waters et al.
patent: 6704908 (2004-03-01), Horan et al.
patent: 2002/0186246 (2002-12-01), Burnette et al.
patent: 2003/0005404 (2003-01-01), Bowyer et al.
patent: 2003/0033039 (2003-02-01), Gutberlet et al.
patent: 2003/0105620 (2003-06-01), Bowen
U.S. Appl. No. 60/362,679, filed Mar. 8, 2002, Prakash et al.
“Loops”,Understanding Behavioral Synthesis(A Practical Guide to High-Level Design), by John P. Elliott, Chapter 6, pp. 77-103 (1999).
“Pipelining”,Understanding Behavioral Synthesis(A Practical Guide to High-Level Design), by John P. Elliott, Chapter 8, pp. 137-154 (1999).
“Handel-C: Software Compiled System Design,” http://www.celoxica.com/methodology/handelc.asp; 2 pages; website visited on Dec. 10, 2003.
Burnette David Gaines
Gutberlet Peter Pius
Do Thuan
Klarquist & Sparkman, LLP
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