Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1998-04-09
2003-06-24
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06584608
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to interactive designing of a printed circuit board pattern and more particularly to a computer-implemented interactive designing process and system of a printed circuit board pattern that enable a designing of such a printed circuit board pattern while taking into consideration various physical design constraints.
Conventionally, there is an interactive designing system of a printed circuit board pattern in which various design constraints are defined and the designing of the printed circuit board pattern is conducted in compliance with the design constraints thus defined.
In a conventional process of interactive designing of a printed circuit board pattern using such a conventional interactive designing system of printed circuit board pattern, a constraint of a wiring length limit, or wiring length limit constraint, is defined for a wiring pattern by a manual procedure irrespective of the property of the material that is used for the wiring pattern such as resistivity. Further, the conventional interactive designing system can define the wiring length only for a wiring pattern connecting the interconnection leads, or pins, of the components having the same electrical potential. Further, it has been necessary, in the conventional interactive design system of a printed circuit board pattern, to define the order of the connection that is made at the time of the wiring, for all the component pins in order to define the interconnection of the wiring elements.
Further, the conventional process of designing a printed circuit board pattern displays, when determining the layout of the components on the printed circuit board, the area in which a layout (or relocation) of a wiring pattern or component is possible, as an indication of a predicted consumption of wiring resource available for a component pin in which a wiring length limit is imposed. Further, it is practiced to change the color of the rats-nest, which is a hypothetical line connecting the component pins of the same electrical potential level, as an indication of prediction of the consumption of the wiring resource. Further, it should be noted that the wiring length is defined in the conventional printed circuit board pattern design system and process only for a connection between a pair of component pins, wherein the wiring length limit is displayed on a screen in the form of a diamond-shaped region indicative of a possible region of an interval in which the wiring length constrained is imposed.
In such a conventional designing system and process of a printed circuit board pattern, it has been practiced to define or set the design constraints such as a wiring length limit constraint value of the printed circuit board pattern by a manual procedure of a human operator based solely on the characteristics of the net. A net is the connection information between a component pin and another component pin connected to the former. Thereby, the human operator has to determine the design constraints by taking into consideration the characteristics of a net that forms a circuit logic. Thus, there has been a case in which the constraint value set by the human operator is inappropriate. Further, there can be a case in which the constraint value, while itself may be set in conformity with the property of the net of the circuit logic, cannot be observed in a real printed circuit board due to the physical shape of the components which is not considered at the time of the designing.
Conventionally, the wiring length has been defined only for those component pins in which the electrical potential is identical. It was not possible to define a wiring length for those component pins separated from a reference pin by a maximum distance extending over one or more component pins, and thus, the conventional layout of the components on a printed circuit board has lacked flexibility. For example, the mutual positional relationship between the components has been fixed once the wiring length is defined. Further, it was not possible to mix the components operating at different electrical voltages in the circuit to be formed. This leads to a situation in which the wiring length limit constraint value has to be determined for each voltage level and the definition or setting of the wiring length limit constraint value has to be made for each electrical voltage. Thereby, the conventional designing process of a printed circuit board has lacked flexibility.
When defining a connection of a wiring element, it has further been necessary to prescribe the order of connection, or connection order, at the time of the wiring for all the component pins. Thus, it has been necessary to prescribe the connection order also to those parts that do not actually require the prescription of the connection order. Thereby, the process of defining a connection becomes a time-consuming process and the wiring length tends to be increased unnecessarily due to the rigid rule of the connection order.
Further, the conventional designing process of a printed circuit board pattern, which displays, when determining the layout of the components, the region in which a layout (relocation) of a wiring pattern or component is possible or changes the color of the rats-nest connecting the component pins of the same electrical potential, so as to display the predicted consumption of the wiring resource for a component pin in which the wiring length limit constraint is imposed, has suffered from the problem in that, while the conventional process may be capable of discriminating whether or not the design rule is violated when a component is laid out (relocated), it has not been possible for a designer to grasp visually the actual wiring length or evaluate numerically the wiring resource that is remaining or available. Further, when an equi-wiring length constraint is imposed, it has not been possible, while being able to comply with the wiring length constraint, to observe the equi-wiring length constraint due to the absence of knowledge on other components that have to observe the equi-wiring length constraint. Thereby, there has been an inconvenience such as the component layout once determined has to be modified. Thereby, the efficiency of designing is deteriorated substantially.
Further, in view of the fact that the conventional process of designing a printed circuit board pattern defines the wiring length only between the component pins without consideration on the physical relationship between the component pin positions, the wiring has to be carried out in such a conventional designing process consecutively from one path to another path prescribed by a rule. Thereby, there can be a case in which the processing that obeys the strict rule does not always provide optimum pattern data in which the overall wiring length is minimized. For example, the overall wiring length obtained by the conventional process may be minimized further by changing the order of wiring depending on the positional relationship between the components. The same situation can occur in the case where there is an equi-wiring length constraint, as the same process as to the foregoing is employed for each path in such a case.
It should further be noted that the conventional design process of a printed circuit board pattern visualize the wiring length limit by using a diamond-shaped region indicating a wiring length restriction area in which a wiring is possible. Thus, it may be thought that the diamond-shaped region indicates the region in which the design rule is complied with. However, an actual printed circuit board generally includes a detour of the wiring pattern due to the manufacturing process of the printed circuit board. Such a detour of the wiring pattern occurs for example in correspondence to via-holes that are formed in the printed circuit board with a constant interval for an automated conduction test that has to be conducted at the time of manufacturing of the printed circuit board. Thereby, the wiring pattern consumes the wiring path lengt
Kigoshi Junichi
Kumada Touru
Kumagai Kazunori
Yamaguchi Takao
Fujitsu Limited
Rosenman & Colin LLP
Smith Matthew
Thompson A. M.
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