Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2011-05-24
2011-05-24
Pan, Daniel (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Branching
C712S040000
Reexamination Certificate
active
07949863
ABSTRACT:
A method and system for inter-port communication utilizing a multi-port memory device. The memory device contains an interrupt register, an interrupt signal interface (e.g., a dedicated pin), an interrupt mask, and one or more message buffers associated with each port. When a first component coupled to a first port of the memory device wants to communicate with a second component coupled to a second port of the memory device, the first component writes a message to a message buffer associated with the second port. An interrupt in the input register of the second port is set to notify the second component coupled to the second port that a new message is available. Upon receiving the interrupt, the second component reads the interrupt register to determine the nature of the interrupt. The second component then reads the message from the message buffer.
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Cho Myung Rai
Kim Dae Kyeung
Kim Sungjoon
Lee Dong-Yun
Ruberg Alan T.
Blakely Sokoloff Taylor and Zafman
Pan Daniel
Silicon Image Inc.
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