Inter-layer interconnection structure for large electrical...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S612000

Reexamination Certificate

active

10623082

ABSTRACT:
Embodiments of the invention include an electrical interconnection structure for connection to large electrical contacts. The electrical interconnection includes a semiconductor substrate having a conductive pad layer formed thereon. A dielectric layer having a plurality of elongate trenches is formed over the conductive pad layer such that the elongate trenches extend through the dielectric layer to the underlying conductive pad layer. Elongate conductive contacts are formed in the elongate trenches to establish electrical connections to the underlying conductive pad layer. The long axes of the elongate bar trenches can be arranged substantially parallel to the long axes of the slots formed in the copper pad. Alternatively, the long axes of the bar trenches can be arranged transversely to the long axes of the slots formed in the copper pad. In some embodiments, the conductive contacts are formed such that they establish electrical connection with sidewalls of the underlying conductive pad layer. Other embodiments address the methods of manufacturing the electrical interconnection structures of the present invention.

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patent: 6197688 (2001-03-01), Simpson
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patent: 6313537 (2001-11-01), Lee et al.
patent: 6313540 (2001-11-01), Kida et al.
patent: 6746951 (2004-06-01), Liu et al.
patent: 58110055 (1983-06-01), None

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