Intent seizes in a multi-processor environment

Details Intent seizes in a multi-processor environment Intent seizes in a multi-processor environment

2006-10-24

2006-10-24

Bragdon, Reginald G. (Department: 2189)

Electrical computers and digital processing systems: memory

Address formation

Hashing

C711S145000, C711S163000

Reexamination Certificate

active

07127587

ABSTRACT:
A method, apparatus, system, and signal-bearing medium that in an embodiment use a requested address for an intent seize and a processor associated with the intent seize to determine a hash table entry. If the requested address is not found in the hash table, all hash tables for all processors are updated to anchor to the requested address. Non-intent seizes use a hash table associated with a designated processor, regardless of whether the designated processor initiated the non-intent seize. In this way, in an embodiment modified, cache line interventions may eliminated for intent seizes.

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patent: 6578131 (2003-06-01), Larson et al.
patent: 2003/0084057 (2003-05-01), Balogh

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