Intelligent write in an EEPROM with data and erase check

Details Intelligent write in an EEPROM with data and erase check Intelligent write in an EEPROM with data and erase check

1985-11-27

1988-08-09

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Bad bit

365218, 365201, G11C 1134, G11C 2900

Patent

active

047633050

ABSTRACT:
A memory provides a byte program mode which avoids unnecessary erase and program cycles. If a byte is to be programmed, the new data to be written is first compared to the existing data in the byte. If the old data is the same as the new data, there is no need to do a conventional erase/program cycle. In such case the memory does not perform the erase and reprogram which saves much time and avoids decreasing the life of the floating gate transistors in the byte. Even if the old data is not the same as the new data, the byte may already be in the erased state. In such case the erase cycle is skipped and programming is begun.

REFERENCES:
patent: 4203158 (1980-05-01), Frohmann-Bentchkowsky et al.
patent: 4266283 (1981-05-01), Perlegos et al.
patent: 4366555 (1982-12-01), Hu
patent: 4460982 (1984-07-01), Gee et al.
patent: 4489404 (1984-12-01), Yasuoka
patent: 4578751 (1986-03-01), Erwin
Gee et al., "An Enhanced 16K EEPROM", IEEE Journal of Solid State Circuits, vol. SC-17, No. 5, Oct. 1982, pp. 828-832.

Affiliated with

Also associated with

Rating

Intelligent write in an EEPROM with data and erase check does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Intelligent write in an EEPROM with data and erase check, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Intelligent write in an EEPROM with data and erase check will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-922715