Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
1999-05-21
2001-09-11
Bragdon, Reginald G. (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S168000, C710S057000
Reexamination Certificate
active
06289421
ABSTRACT:
BACKGROUND OF THE INVENTION
Data passing between a digital signal processor (“DSP”) and a microcontroller typically requires a significant amount of overhead in the form of either hardware or software protocols. It is difficult to design a system to transfer data between a DSP and microcontroller due to “timing” constraints. For example, both the DSP and microcontroller are internally controlled by firmware or the like having embedded commands which govern when the DSP or microcontroller may send or receive data. These data “cycles” occur periodically or may be actuated when a specific signal, called a hardware “interrupt” is received by the DSP or microcontroller. Using interrupts is a partial solution, but it has its costs. The use of hardware interrupts devours precious processing time from both the DSP and microcontroller, time that could be spent doing other things. Another solution is to use a dual port random access memory (“RAMP”) in between the DSP and microcontroller. However, contemporary dual port RAMs are expensive, dense static RAM (“SRAM”) devices which have high “pin” counts. Pins are the physical connections which protrude from an electronic device, typically used to connect the device to other devices or signals. To access an SRAM/RAM both the DSP and microcontroller must be designed to include a substantial number of pins which are used to retrieve or send commands or data from/to an SRAM. In addition, certain data communication protocols must be used by the DSP and microcontroller in order for them to distinguish between information which is related to commands and that which is pure data and for making other decisions, such as how much data can be transferred in a given time period and where the data can be sent (i.e., what part of the DSP or microcontroller's memory is available to store data). All of which, again, ties up precious processing time and resources.
Accordingly, it is an object of the present invention to provide for devices which allow for the transfer of data between two or more electronic devices, such as a DSP and microcontroller, which frees both from the need to consider each others' timing constraints.
It is a further object of the present invention to provide for devices which allow for the transfer of data between two or more electronic devices, such as a DSP and microcontroller, and which does not require either device to have a substantial number of pins for retrieving or sending data.
It is still another object of the present invention to provide for devices which allow for the transfer of data between two or more electronic devices, such as a DSP and microcontroller, which reduces the amount of processing time needed to transfer data between devices.
Other objectives, features and advantages of the present invention will become apparent to those skilled in the art from the following description taken in conjunction with the accompanying drawings.
SUMMARY OF THE INVENTION
In accordance with the present invention, memory devices are provided for storing data generated by two or more electronic devices, such as a DSP or microcontroller. The novel memory devices comprise at least first and second memory sections. The first memory section is dedicated to the storage of data from the DSP only while the second memory section is dedicated to the storage of data from the microcontroller, and only the microcontroller. Data is stored on a first-in, first-out basis. Once stored, the data may only be retrieved from the particular memory section by the “opposite” device. That is, data stored in the first memory section by the DSP can only be retrieved by the microcontroller and data stored in the second memory section by the microcontroller can only be retrieved by the DSP.
Data is input and output via first and second data input/output sections, respectively. The first data input/output (“I/O”) section allows data to be input into the first memory section and output from the second memory section; the second data input/output section allows data to be input into the second memory section and output from the first memory section. The first data input/output section may be viewed as being dedicated to the transfer of data to and from the DSP while the second data input/output section is dedicated to the transfer of data to and from the microcontroller.
The first and second data input/output sections form a “dual port access” to the first and second memory sections. Data can simultaneously be input or output from both memory sections via both I/O sections. The I/O sections may be serial or parallel sections for receiving/transmitting serial or parallel data.
The use of a dual port memory device substantially reduces the need for the DSP or microcontroller to keep track of each others' timing constraints/cycles. Either device can simply “dump” data into the memory device and go on about its' business. At some later time, the data can be retrieved by the opposite device during an appropriate time period. When serial data is used, the number of pins needed by the DSP or microcontroller to transmit or receive data is substantially reduced.
The inventive devices and methods also comprise first and second data indication sections. These sections provide the DSP and microcontroller with information about the type of data being transmitted to them from the memory device. These sections are also used to provide the DSP and microcontroller with an indication of how much memory capacity is still available in the first or second memory sections, capacity which can be used to store more data. Said another way, these sections provide the DSP and microcontroller with an indication of how much data can be “written to”, i.e. input into, the memory sections. Likewise, the first and second indication sections provide the DSP and microcontroller with an indication of how much data is still to be “read from”, i.e., output from, the memory sections. Finally, the indication sections provide information to the memory device itself. When data is transmitted from the DSP or microcontroller, these sections tell the memory device the type of data it is receiving, i.e., data, command data, acknowledgment data, device status data, etc . . . In one embodiment of the invention the first and second data indication sections may input and/or output a pair of data bits to provide the DSP, microcontroller or memory device with a proper indication.
No longer must the DSP and microcontroller spend a large amount of processing time
2
interpreting commands and data using a communications protocol in order to determine how much data can be read from, or written to, memory. This information is provided by the first and second indication sections through the use of a pair of data bits or the like.
The novel memory devices comprise other features which help save processing time as well. A plurality of “memory pointers” are used to manage the input and output of data. Each memory section is given at least two pointers; one which “points” to the next, available memory location where data can be stored (input) and one which points to the next memory location where data must be output. The DSP or microcontroller no longer have to worry about addressing a certain memory location before sending or receiving data. Once the first or second indication sections indicate there is room to send or receive data, the DSP or microcontroller can act.
The present invention and its advantages can be best understood with reference to the drawings, detailed description of the preferred embodiments and claims that follow.
REFERENCES:
patent: 5473756 (1995-12-01), Traylor
patent: 5497373 (1996-03-01), Hulen et al.
patent: 5802351 (1998-09-01), Frampton
Ali Syed S.
Hobbi Mohd Majed
Szep Steven C.
Bragdon Reginald G.
Curtin, Esq. John E.
Lucent Technologies - Inc.
Troutman Sanders Mays & Valentine
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