Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Reexamination Certificate
2006-10-03
2006-10-03
Cho, James (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Output switching noise reduction
C326S021000, C326S022000, C326S023000, C326S024000, C326S025000, C326S027000, C326S028000, C326S029000, C326S030000, C327S263000, C327S276000, C327S277000
Reexamination Certificate
active
07116126
ABSTRACT:
A method of transmitting adjacent signals is disclosed. Sensing is performed on signals in the group and adjacent signals are either switched or delayed if the adjacent signals are switching at the same time. The method is used in networks where coupling and capacitance effects are possible.
REFERENCES:
patent: 4404663 (1983-09-01), Saeki et al.
patent: 5306967 (1994-04-01), Dow
patent: 5313501 (1994-05-01), Thacker
patent: 5362996 (1994-11-01), Yizraeli
patent: 5646543 (1997-07-01), Rainal
patent: 5994946 (1999-11-01), Zhang
patent: 6008705 (1999-12-01), Ghoshal
patent: 6414542 (2002-07-01), Lin et al.
patent: 6532574 (2003-03-01), Durham et al.
patent: 6570931 (2003-05-01), Song
patent: 2001/0046205 (2001-11-01), Easton et al.
patent: 2002/0124230 (2002-09-01), Cai et al.
patent: 2003/0031194 (2003-02-01), Sharma et al.
patent: 2003/0108109 (2003-06-01), Khieu et al.
patent: 2003/0120982 (2003-06-01), Levy et al.
patent: 2005/0094709 (2005-05-01), Lakkis
Sharma Harsh D.
Tomsio Nayon
Cho James
Crawford Jason
Zagorin O'Brien Graham LLP
LandOfFree
Intelligent delay insertion based on transition does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Intelligent delay insertion based on transition, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Intelligent delay insertion based on transition will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3702965