Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1999-12-08
2002-10-01
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06460164
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to the integration of externally developed logic in a memory mapped system and is concerned more specifically, but not exclusively with such integration in application-specific integrated circuits (ASICs),
BACKGROUND TO THE INVENTION
The development of deep submicron integrating technology has made possible the integration of complete systems within a single semiconductor device. The strong point for the design of such systems is usually a set of established functions which may already be implemented as separate devices. When developing such systems, designers typically create a prototype system by interconnection of two or more separate devices, and then develop system software on the basis of the prototype system to test the system interaction. Some customers also use these prototype systems for early production runs, so that they can test the market response to the product and gauge its future potential. Once a viable product has been proved, the system is then rationalised to reduce its cost. This involves combination of the separate devices into a single chip, and such rationalisation can give rise to difficulties in the transition from the separate devices to the single chip solution due to the fact that integration of the logic necessitates changes to the software and hardware. Such changes lead to differences in the operation of the prototype system and the single chip solution, and provide an increased marketing risk Also re-verification of the solution takes time and increases the time-to-market (TTM) period, thus reducing the marketable lifespan of the product.
An example will now be given of the manner in which an ASIC might be developed using current technology. This example will be described with reference to FIG.
1
and is concerned with development of a system comprising a processor based microcontroller
1
in association with memory devices
2
and
3
and other user-specific peripheral components
4
and
5
. Peripheral components may be one of a bus master or a bus slave. A prototype system is produced in which the components are provided on separate interconnected devices which share common address and data busses, collectively called the system bus
6
, for communication between them. Typically six to twelve months is then spent in developing the hardware and software before the prototype system is finally shown to work correctly in its required application. Commonly limited quantities of the prototype system are then released for integration by third parties and to assess the general market response. If the market response is favourable filer development is required by integrating the memory and peripheral components with the microcontroller to create an ASIC and to thereby provide a cost reduction. The final integrated circuit solution may comprise one or more interconnected chips.
However the current approach to such integration is to consider the ASIC solution as a totally new device, and thus reworking of all interfaces and changing of data paths is required in order to obtain the perceived optimum solution. Such an approach invariably leads to significant changes to the software and has a knock-on effect on system validation test suites. The solution takes a significant period of time and also increases the risk of errors as the previously developed prototype system has to be significantly altered.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a means by which the integrated circuit solution can be developed from a prototype system with minimum change to the integrating logic or to any associated software.
According to the present invention there is provided an integrated circuit comprising an application-non-specific library cell, externally developed logic circuitry integrated with the library cell, and an up-integration module (UIM) connected to the library cell and to the logic circuitry and providing a two-way interface between the library cell and the logic circuitry and between the library cell and an external device such that logic developed for a prototype system comprising such a library cell in association with external logic circuitry can be integrated into the circuit without requiring any change in its function or in the program code developed for the prototype system.
The use of an application-non-specific library cell in association with the externally developed logic and the UIM enables the transition from the prototype system to the ASIC to be effected in a straightforward manner without requiring significant changes to the logic and/or associated software.
The invention also provides a method of integrating externally developed logic in a memory mapped system, the method comprising creating a prototype system using an application-non-specific library cell in association with external logic circuitry, and subsequently creating an integrated circuit by combining such a library cell with the logic circuitry and an up-integration module (UIM) which is connected to the library cell and to the logic circuitry and provides a two-way interface between the library cell and the logic circuitry and between the library cell and an external device such that the externally developed logic is integrated into the circuit without requiring any change in its function or in program code developed for the prototype system.
REFERENCES:
patent: 4303990 (1981-12-01), Seipp
patent: 5379382 (1995-01-01), Work et al.
patent: 5452227 (1995-09-01), Kelsey et al.
patent: 5592625 (1997-01-01), Sandberg
patent: 5687325 (1997-11-01), Chang
patent: 5860141 (1999-01-01), Washington et al.
patent: 5898595 (1999-04-01), Bair et al.
patent: 0 871 223 (1998-10-01), None
patent: 7129428 (1995-05-01), None
patent: 7129428 (1996-05-01), None
patent: WO 97/40450 (1997-10-01), None
patent: WO 98/15976 (1998-04-01), None
Ainsley Philip I. J.
Smith Mike A. P.
Worroll Maison L.
Garbowski Leigh Marie
Kirschstein et al.
Mitel Semiconductor Limited
Smith Matthew
LandOfFree
Integration of externally developed logic in a memory mapped... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integration of externally developed logic in a memory mapped..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integration of externally developed logic in a memory mapped... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2935336