Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-11-21
2006-11-21
Thompson, A. M. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000, C326S038000, C326S039000, C326S040000
Reexamination Certificate
active
07139995
ABSTRACT:
Method and apparatus for integrating a run-time parameterizable logic core with a static circuit design. A configuration bitstream is generated from a main circuit design that is specified in a hardware description language. The main circuit design includes a first sub-circuit design that specifies a selected subset of resources of the PLD needed by the RTP core and an interface between the RTP core and other parts of the main circuit design. Via execution of a run-time reconfiguration control program, the configuration data that correspond to the first sub-circuit design are replaced with configuration data that implement the RTP core. The run-time reconfiguration program then configures the PLD with the updated configuration bitstream.
REFERENCES:
patent: 6216258 (2001-04-01), Mohan et al.
patent: 6279045 (2001-08-01), Muthujumaraswathy et al.
patent: 6311316 (2001-10-01), Huggins et al.
patent: 6401230 (2002-06-01), Ahanessians et al.
patent: 6487709 (2002-11-01), Keller et al.
patent: 6510546 (2003-01-01), Blodget
patent: 6530071 (2003-03-01), Guccione et al.
patent: 6668237 (2003-12-01), Guccione et al.
patent: 6725441 (2004-04-01), Keller et al.
Press Release from Altera Corporation, Altera's Mega Wizard Plug-Ins Offer the First Too-Independent Parameterized Logic Cores, Feb. 2, 1998.
Roxby et al., “Automated extraction of run-time parameterisable cores from programmable device configurations”, Apr. 2000, Field-Programmable custom computing machines, 2000 IEEE Symposium, pp. 153-161.
Peter Bellows, Brad Hutchings; “JHDL—An HDL for Reconfigurable Systems”; Proceedings of IEEE Symposium on Field-Programmable Custom Computing Machines; Apr. 1998; 10 pages.
Philip B. James-Roxby, Daniel J. Downs; “Cores and Anti-cores: Using JBits as Part of a Mainstream Design Fow”; Proceedings of 8th Reconfigurable Architectures Workshop; Apr. 27, 2001; 6 pages.
Downs Daniel J.
James-Roxby Philip B.
Morgan Russell J.
Patterson Cameron D.
Maunu LeRoy D.
Rossoshek Helen
Thompson A. M.
Xilinx , Inc.
LandOfFree
Integration of a run-time parameterizable core with a static... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integration of a run-time parameterizable core with a static..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integration of a run-time parameterizable core with a static... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3683949