Integrating analog to digital converter

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C341S155000, C341S156000

Reexamination Certificate

active

07728754

ABSTRACT:
An integrating analog to digital converter (ADC) is disclosed that comprises a Delay Locked Loop (DLL) (2, 50) which is synchronized to a reference clock signal (12). A rising edge of a clock signal therefore propagates through the DLL once each clock cycle. In use, the integrating ADC converts an analog input signal to a digital output signal dependent upon a timing measurement of an integration carried out by an integrator (4). The timing measurement is taken by reading the logical states of the individual delay cells in the DLL. This enables the position of the rising edges of the clock signal to be determined and used as a timing measurement. The timing measurement is in the form of a digital thermometer code that can be converted into a binary number.

REFERENCES:
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patent: 2005/0057388 (2005-03-01), Terazawa et al.
patent: 2005/0062482 (2005-03-01), Vincent et al.
patent: 2005/0140422 (2005-06-01), Klemmer
Cura, J. L; et al “A Novel 12-Bit, 3 /SPL MU/S, Integrating-Type CMOS Analog-To-Digital Converter” Proceedings. XI Brazilian Symposium on Integrated Circuit Design, 1998. Sep. 30, 1998, pp. 74-77.
Farjad-Rad, Ramin; et al “A Low-Power Multiplying DLL for Low-Jitter Multigigahertz Clock Generation in Highly Integrated Digital Chips” IEEE Journal of Solid-State Circuits, vol. 37, No. 12, Dec. 2002, pp. 1804-1812.
Savoj, J; et al “A CMOS Interface Circuit for Detection of 1.2 GB/S RZ Data” International Conference of Solid-State Circuit. Digest of Techincal Papers. ISSCC. Feb. 15, 1999, pp. 278-279.

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