Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-01-30
2008-08-12
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C703S016000
Reexamination Certificate
active
07412673
ABSTRACT:
A method for determining an allowable simultaneous switching output level on a bank-by-bank basis is described. An inductance scaling factor is determined for a first bank. A noise limit scaling factor is determined for the first bank. A bounce voltage scaling factor is determined for the first bank. The inductance scaling factor, the noise limit scaling factor, and the bounce voltage scaling factor are multiplied with one another to provide the simultaneous switching output level for the first bank.
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Kik Phallaka
Webostad W. Eric
XILINX Inc.
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