Integrated structures and fabrication methods thereof...

Details Integrated structures and fabrication methods thereof... Integrated structures and fabrication methods thereof...

2008-06-24

2009-11-17

Dinh, Tuan T (Department: 2841)

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

C361S764000, C361S766000, C361S784000

Reexamination Certificate

active

07619901

ABSTRACT:
Circuit structures and methods of fabrication are provided for facilitating implementing a complete electronic system in a compact package. The circuit structure includes, in one embodiment, a chips-first multichip base layer with conductive structures extending therethrough. An interconnect layer is disposed over the front surface of the multichip layer and includes interconnect metallization electrically connected to contact pads of the chips and to conductive structures extending through the structural material. A redistribution layer, disposed over the back surface of the multichip layer, includes a redistribution metallization also electrically connected to conductive structures extending through the structural material. Input/output contacts are arrayed over the redistribution layer, including over the lower surfaces of at least some integrated circuit chips within the multichip layer, and are electrically connected through the redistribution metallization, conductive structures, and interconnect metallization to contact pads of the integrated circuit chips of the multichip layer.

REFERENCES:
patent: 4783695 (1988-11-01), Eichelberger et al.
patent: 5250843 (1993-10-01), Eichelberger
patent: 5353498 (1994-10-01), Fillion et al.
patent: 5841193 (1998-11-01), Eichelberger
patent: 5998859 (1999-12-01), Griswold et al.
patent: 6064114 (2000-05-01), Higgins, III
patent: 6159767 (2000-12-01), Eichelberger
patent: 6426545 (2002-07-01), Eichelberger et al.
patent: 6555908 (2003-04-01), Eichelberger et al.
patent: 6586827 (2003-07-01), Takeuchi et al.
patent: 6818544 (2004-11-01), Eichelberger et al.
patent: 6838776 (2005-01-01), Leal et al.
patent: 6972964 (2005-12-01), Ho et al.
patent: 7006359 (2006-02-01), Galvagni et al.
patent: 7112467 (2006-09-01), Eichelberger et al.
patent: 7122467 (2006-10-01), Lee et al.
patent: 7405102 (2008-07-01), Lee et al.
patent: 2007/0249102 (2007-10-01), Brunnbauer et al.
“Wire Bond and Beyond: Semiconductor Packaging Innovation”, White Paper, Freescale Semiconductor, Inc. Jul. 2006,pp. 1-9.
Leung, John, “Packaging Technology for Mobile Platforms”, Wireless and Mobile Systems Group, Freescale Semiconductor, Inc., printed from Internet on Nov. 18, 2006, pp. 1-28.
Mangrum, Marc, “Packaging Technologies for Mobile Platforms”, Wireless Mobile Systems Group, Freescale Semiconductor, Inc., Sep. 28, 2006, pp. 1-19.
“Redistributed Chip Package (RCP) Technology”, Freescale Semiconductor, Inc., printed from Internet on Nov. 18, 2006, pp. 1-6.
Keser, Beth, “Birds-of-a-Feather: Redistributed Chip Package (RCP) Broad-Range Applications for an Innovative Package Technology”, Freescale Semiconductor, Inc., Jun. 2007, pp. 1-18.
Keser, Beth, “Redistributed Chip Packaging”, http://www.semiconductor.net/index.asp?layout=articlePrint&articleID=CA6428421, Semiconductor International, Apr. 1, 2007, pp. 1-5.
Kohl et al., “Low Cost Chip Scale Packaging and Interconnect Technology”, Proceedings of the Surface Mount International Conference, San Jose, California (Sep. 1997).

Affiliated with

Also associated with

Rating

Integrated structures and fabrication methods thereof... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated structures and fabrication methods thereof..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated structures and fabrication methods thereof... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4094288