Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2011-04-19
2011-04-19
Nguyen, Tuan T (Department: 2824)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S185090, C365S230030, C365S189020
Reexamination Certificate
active
07929362
ABSTRACT:
In an embodiment, an integrated semiconductor memory includes a plurality of data lines via which data read out or to be read out from memory cells can be communicated, wherein the data lines comprise redundant data lines and non-redundant data lines, wherein the semiconductor memory has at least one data distributor line, and wherein a plurality of redundant data lines are connected up to the at least one data distributor line in such a way that in each case a redundant data line or a group of redundant data lines from the plurality of redundant data lines can be selected and can be connected to the at least one data distributor line.
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Economou John S.
Nguyen Tuan T
Qimonda AG
Reidlinger R Lance
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