Integrated semiconductor memory comprising at least one word...

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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C365S230060

Reexamination Certificate

active

11218913

ABSTRACT:
A semiconductor memory and a test method for testing whether word line segments (12) are floating after an activation operation or a deactivation operation is disclosed. For this purpose, the charge-reversal current (I) that occurs in the event of a word line segment (12) being subjected to charge reversal or a charge quantity (Q) which is fed to the word line (12) or conducted away from the word line segment (12) as a result of this is measured. If, upon activation or deactivation of a word line segment (12), the measured charge-reversal current (I) or the corresponding charge quantity (Q) is less than a lower limit value, it is ascertained that the relevant word line segment (12) has a defective contact terminal. In this way, high-impedance or defective contact hole fillings can thereby be identified and the associated word line segments (12) can be replaced by redundant word lines.

REFERENCES:
patent: 5602784 (1997-02-01), Kojima et al.
patent: 5761135 (1998-06-01), Lee
patent: 6570793 (2003-05-01), Stender
patent: 6687146 (2004-02-01), Kurjanowicz et al.
patent: 7085175 (2006-08-01), Remington et al.

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