Integrated semiconductor memory and signal processor

Details Integrated semiconductor memory and signal processor Integrated semiconductor memory and signal processor

1990-08-03

1992-06-09

Bowler, Alyssa H.

Static information storage and retrieval

Read/write circuit

Bad bit

365154, 36523006, 365 51, G11C 700, G11C 800, G11C 11413

Patent

active

051213559

ABSTRACT:
Increasing the storage capacity of high-performance signal processors while maintaining the original RAM cell necessitates modification of the entire lay-out of the circuit. The invention relates to the once-only design of peripheral circuitry which provides control of blocks of 4 full CMOS RAM cells (easy to process) or 9 double-layer polysilicon cells (more difficult to process, but having smaller dimensions). It is defined in the RAM peripheral circuitry whether all 9 cells can be accessed (memory capacity from 2.sup.xx n to (2.sup.xx (n+1)+2.sup.xx (n-2)) or 8 cells can be accessed (memory capacity from 2.sup.x n to 2.sup.xx (n+1).

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I.S.S.C.C., Feb. 1987, USA, J. L. van Meerbergen et al.

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