Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-01-13
2001-03-27
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S689000, C438S710000, C438S719000, C438S723000, C438S704000
Reexamination Certificate
active
06207565
ABSTRACT:
TECHNICAL FIELD
The present invention relates to the field of semiconductor device fabrication. More specifically, the present claimed invention relates to a method for preparing a semiconductor surface for subsequent silicide formation thereon.
BACKGROUND ART
During conventional semiconductor manufacturing, a lightly-doped drain (LDD) spacer is formed by blanket deposition and blanket etchback (spacer etch) of the silicon oxide material. Unfortunately, the fluorocarbon gases (such as CF
4
and CHF
3
) used for spacer etching leave carbon and fluorine embedded in the silicon surface. These residues impair the subsequent formation of TiSi
x
by preventing deposited titanium from reacting with silicon on the surface. TiSi
x
formed on a contaminated silicon surface will have a higher sheet resistance than TiSi
x
formed on clean silicon. U.S. Pat. No. 5,895,245 (Harvey et. al.) discloses the use of a CF
4
/H
2
O plasma to remove the carbon and fluorine residues left after spacer etch.
More recently, spacer etching has been done using a photoresist mask to prevent removal of oxide from certain regions of the wafer. The purpose of this masked spacer etch is to prevent TiSi
x
formation at those locations, thereby creating sections of the gate electrode with high resistivity. High resistivity in certain controlled locations can be advantageous to device designers; however, in general, the lowest possible resistivity is desired to make the device as fast as possible.
The photoresist mask must be removed after the spacer etch. Conventionally, this is done with an O
2
plasma. More specifically, in the prior art, process steps are performed in the following order. First, a masked spacer etch is performed. Next, an O
2
plasma ash is performed to remove the photoresist mask. The use of an O
2
plasma forms a layer of oxide on the wafer, covering the contaminants. After the O
2
plasma ash is performed, prior art processes treat the silicon surface with a CF
4
/H
2
O plasma to remove contaminants. Following the aforementioned steps, titanium deposition and TiSi
x
formation processes are performed.
Unfortunately, the conventional process results in poor TiSi
x
formation and increased sheet resistance. Particularly, prior art processes tend to leave carbon and fluorine residues under the oxide formed by the O
2
plasma ash. Consequently, the subsequent CF
4
/H
2
O process is prevented from removing the carbon and fluorine residues. These residues then impede the efficient formation of a silicide layer.
Thus, a need exists for a formation method which results in the lowest possible resistivity in certain desired regions of the semiconductor substrate. Yet another need exists for a formation method in which contaminants are not trapped on the surface of the semiconductor substrate and thus prevented from being removed.
DISCLOSURE OF THE INVENTION
The present invention provides a method for preparing a semiconductor substrate which results in nearly the lowest possible resistivity in selected regions. Additionally, the present invention provides for a method which does not allow contaminants to become trapped on the semiconductor substrate and thus not removable by conventional processing. The present invention achieves the above accomplishment by first utilizing an ashing method to remove contaminants from the semiconductor and then utilizing an ashing method which removes a photoresist mask.
Specifically, in one embodiment of the present invention, the present invention subjects the semiconductor substrate to an ashing environment. In the present embodiment, the ashing environment is comprised of H
2
O vapor, and a gaseous fluorocarbon or a fluorinated hydrocarbon gas. In so doing, contaminants on the semiconductor substrate are removed. Next, the present embodiment subjects a photoresist mask which covers portions of the semiconductor substrate (and features formed thereon) to a mask-removal ashing environment. In the present invention, the mask-removal ashing environment is comprised of an O
2
plasma. In so doing, remaining portions of the photoresist mask which covers portions of the semiconductor substrate (and features formed thereon) are removed. As a result, the semiconductor substrate and the top of the polysilicon stack are prepared for subsequent silicide formation steps. In so doing, the TiSi
x
will not form on selected regions, but will form well, without residue-induced impedance, on desired regions of the semiconductor substrate.
In another embodiment, the present invention first performs an O
2
plasma mask-removal ashing step to remove the photoresist mask. Next, the present embodiment performs an oxide etch step to remove the oxide that grew on the semiconductor substrate during the O
2
plasma mask-removal ashing step. The oxide etch may be performed with a hydrofluoric acid dip or by subjecting the semiconductor substrate to a CF
4
plasma ashing environment. Next, the present embodiment subjects the semiconductor substrate and the polysilicon stack to an ashing environment which is comprised of H
2
O vapor, and a gaseous fluorocarbon or a fluorinated hydrocarbon gas. As a result, the semiconductor substrate and the top of the polysilicon stack are prepared for subsequent silicide formation steps.
In still another embodiment, the present invention subjects the semiconductor substrate to a combination ashing environment This combination ashing environment combines an O
2
plasma, for removing the photoresist mask, with a CF
4
plasma to simultaneously remove the oxide which grows on the semiconductor substrate as a result of the O
2
plasma ashing. As a result, the silicon surface of the semiconductor substrate remains open and accessible for a treatment ashing step which removes contaminants on the semiconductor substrate. The treatment ashing environment is comprised of H
2
O vapor, and a gaseous fluorocarbon or a fluorinated hydrocarbon gas. As a result, the semiconductor substrate is prepared for subsequent silicide formation steps. In this embodiment of the present invention, the combination of an O
2
and CF
4
plasma ash can be performed either before or after the treatment ashing step.
These and other objects and advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various drawing figures.
REFERENCES:
patent: 4892845 (1990-01-01), Bridges
patent: 5630904 (1997-05-01), Aoyama et al.
patent: 5895245 (1999-04-01), Harvey et al.
patent: 6000411 (1999-12-01), Lee
patent: 6025273 (2000-02-01), Chen et al.
Gabriel Calvin Todd
Sengupta Samit
Yeh Edward K.
Smith Matthew
VLSI Technology, Inc
Wagner , Murabito & Hao LLP
Yevsikov V.
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