Integrated process flow to improve copper filling in a...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S622000, C438S624000, C438S638000, C438S639000, C438S640000, C438S643000, C438S678000, C438S687000, C438S696000, C438S724000, C438S757000

Reexamination Certificate

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06924221

ABSTRACT:
A process for fabricating a dual damascene structure of copper has been developed. This process uses a thin nitride spacer, approximately 100 Angstroms thick, at the bottom of the via, thus preventing recessed nitride during the resist stripping process.

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Wolf, Ph.D., Stanley, Richard N. Tauber, Ph.D., “Chemical Vapor Deposition of Amorphous and Polycrystalline Films,” Silicon Processing for the VLSI Era—vol. 1: Process Technology, Lattice Press, 1986 (pp. 191-194).
Wolf, Ph.D., Stanley, Richard N. Tauber, Ph.D., “Dry Etching for VLSI Fabrication,” Silicon Processing for the VLSI Era—vol. 1: Process Technology, Lattice Press, 1986 (pp. 539-542).

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