Integrated pad and fuse structure for planar copper metallurgy

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438622, 438623, 438626, 438627, 438688, 438687, 438642, H01L 2940, H01L 2348, H01L 2352

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active

057958190

ABSTRACT:
A semiconductor interconnection consists of a corrosion resistant integrated fuse and Controlled, Collapse Chip Connection (C4) structure for the planar copper Back End of Line (BEOL). Non copper fuse material is directly connected to copper wiring.

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J. E. Cronin et al. "Polysilicon Strap Process for Fuseszz", Kenneth Mason Publications Ltd, England, Mar. 1990, No. 311.
K. B. Albaugh et al. "Fuse Structure for Wide Fuse Materials Choice", vol. 32, No. 3A, Aug. 1989, pp. 438-439.

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