Integrated memory device having columns having multiple bit...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S314000

Reexamination Certificate

active

07915662

ABSTRACT:
A memory device using tunneling field effect transistors (TFET) and buried bit lines is presented. The memory device includes a matrix containing rows and columns of storage cells. Each storage cell contains at least one cell transistor, which in turn contains first doped regions and second doped regions, one of which is a source and the other a drain. The memory device includes word lines, each of which is connected to storage cells of one row and bit lines, each of which is connected to storage cells of one column. The first doped regions are of a different doping type than the second doped regions.

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