Integrated memory circuit having a redundancy circuit and a...

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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C365S225700, C365S201000

Reexamination Certificate

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06985390

ABSTRACT:
An integrated memory circuit having a redundancy circuit for replacing a memory area having an address by a redundant memory area assigned to the redundancy circuit and method for replacing a memory area. In one embodiment, the redundancy circuit comprises one or more fuse storage elements in which the address of the memory area which is to be replaced by the redundant memory area can be set, wherein, for the purpose of setting the address, each of the fuse storage elements may be set to a first state by the respective fuse storage element being left unchanged and set to a second state by the respective fuse storage element being permanently changed, an activation fuse storage element for activating the address stored in the fuse storage elements for replacing the memory area with the redundant memory area, and a deactivation storage element for permitting or preventing replacement of the memory area having the address by the redundant memory area, wherein the deactivation storage element is connected to the fuse storage elements in such a way as to prevent replacement of the memory area if each of the fuse storage elements has been permanently changed and set to the second state.

REFERENCES:
patent: 5621691 (1997-04-01), Park
patent: 5912579 (1999-06-01), Zagar et al.
patent: 6191982 (2001-02-01), Morgan
patent: 6292422 (2001-09-01), Pitts
patent: 199 54 346 (2001-06-01), None
patent: 101 26 301 (2002-12-01), None
Examination Report dated Mar. 16, 2004.

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