Integrated memory circuit

Details Integrated memory circuit Integrated memory circuit

2006-09-26

2006-09-26

Phan, Trong (Department: 2827)

Static information storage and retrieval

Format or disposition of elements

C365S052000, C365S063000

Reexamination Certificate

active

07113417

ABSTRACT:
In a memory circuit integrated on a semiconductor chip, an interface system is formed between the connection pads and associated internal signal lines and contains a respective separate and complete interface circuit for each of at least two different modes of operation of the memory circuit. Each interface circuit is arranged distributed over a plurality of spaced sections of the chip surface such that sections of different interface circuits alternate with one another. Only the interface circuit which is associated with the mode of operation which is desired when the memory circuit is being used is operatively connected between the connection pads and the associated internal signal lines by metallizations in the topmost metallization plane.

REFERENCES:
patent: 5815427 (1998-09-01), Cloud et al.
patent: 5943287 (1999-08-01), Walton
patent: 6094375 (2000-07-01), Lee
patent: 6157560 (2000-12-01), Zheng
patent: 6215720 (2001-04-01), Amano et al.
patent: 6317377 (2001-11-01), Kobayashi
patent: 6622197 (2003-09-01), Kim
patent: 2001/0008491 (2001-07-01), Sumimoto
German Patent Office Examination Report dated Aug. 20, 2004.

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