Integrated memory

Static information storage and retrieval – Read/write circuit – Differential sensing

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Details

365203, 36518902, G11C 702

Patent

active

06101141&

ABSTRACT:
The integrated memory has a data line pair, which is connected to a bit line pair via at least one differential amplifier. In addition, it has a control unit for setting first potential states on the data line pair which correspond to the differential signals of data to be written to the memory cells, and for setting at least one second potential state on the data line pair which does not correspond to any datum to be written to the memory cells. Furthermore, it has a detector unit having two inputs connected to the data line pair. The detector unit initiates a specific control function when the second potential state of the data line pair occurs.

REFERENCES:
patent: 5015891 (1991-05-01), Choi
patent: 5160861 (1992-11-01), Lee
patent: 5283760 (1994-02-01), Chin et al.
patent: 5502684 (1996-03-01), Koshikawa et al.
patent: 5539700 (1996-07-01), Kawahara et al.
patent: 5574687 (1996-11-01), Nakase
patent: 5710737 (1998-01-01), Komiya et al.

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